Synchronization and time keeping method for synchronous sampling signals
A technology for synchronizing sampling and signals, which is applied in multiplexing communication, time-division multiplexing systems, electrical components, etc., to solve the problem of sampling asynchrony, improve accuracy, and improve measurement accuracy.
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[0030] The technical solution of the present invention will be described in connection with the accompanying drawings:
[0031] In this embodiment, the EPM 570 is used as the master chip, the system clock fsys is 50 MHz; the period T of the input synchronization base wave signal FB is 10 ms, the frequency fs of the output synchronous sampling signal is 4 kHz, and the period is 250 microseconds.
[0032] like figure 1 , Synchronous sampling signal synchronous and traveling method, including the following steps:
[0033] S1, perform system initialization, configure the synchronization input pin of the master chip to input, register CNT, CNT_H, CNT_L clear, the travel time flag TKEEP_FLAG is cleared, the system clock frequency fsys initial value is set to 50MHz.
[0034] Detect whether the synchronous base wave signal of the external input is normal, and step S2-1 and steps S2-2 are synchronized normally, otherwise the proceeds to step S3. Specifically, the synchronous input pin of t...
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