Processing unit, related device, and tensor calculation method

Abstract

The invention provides a processing unit, a related device and a tensor calculation method. The processing unit comprises a plurality of calculation units which form a calculation matrix with n rows and m columns, and n and m are non-zero natural numbers; a computing unit controller which is used for controlling the computing matrix to work in a multicast data input mode under the condition that the bandwidth of the external environment where the processing unit is located meets the preset bandwidth requirement, wherein data is broadcasted to all the computing units in the corresponding columns according to the columns and broadcasted to all the computing units in the corresponding rows according to the rows, and under the condition that the external environment bandwidth does not meet the preset bandwidth requirement, the calculation matrix is controlled to work in a pulse data input mode, and the calculation units receive data from the calculation units in the same row of the previous column and the calculation units in the previous row of the same column so as to support tensor operation. According to the embodiment of the invention, the working mode of the calculation matrix is flexibly configured according to the external environment bandwidth of the processing unit, so that the external environment bandwidth of the processing unit is adaptive to the calculation capability, and the calculation energy efficiency of the processing unit is improved.

Description

technical field [0001] The present disclosure relates to the field of chips, and in particular, to a processing unit, a related device, and a tensor operation method. Background technique [0002] Deep learning is currently widely used in face recognition, speech recognition, automatic driving and other fields. Since deep learning relies on a large number of repeated tensor operations such as convolution and matrix operations, traditional hardware is inefficient in executing the corresponding algorithms. Therefore, a computing architecture dedicated to executing them has emerged as the times require. The deep learning processing units in these architectures employ computational matrices composed of multiple computational units. Each calculation unit in the calculation matrix performs convolution and operation of elements in the matrix operation, and then accumulates the operation results to obtain the tensor operation result. There are generally two ways to transmit the el...

AI Technical Summary

Problems solved by technology

When the bandwidth of the external environment is low, the multicast data input mode cannot be used for efficient calculation, and the idle waiting state of the computing unit is often

When the bandwidth of the external environment is high, the pulse data input mode cannot fully utilize the bandwidth and resources

These all cause the external environmental bandwidth and computing power of the processing unit to be unsuitable, reducing the computing energy efficiency of the processing unit

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