Automatic chip grouping and packaging method and system based on machine learning

Abstract

The invention discloses an automatic chip grouping and packaging method and system based on machine learning, and relates to the field of chip packaging. The method comprises the following steps: obtaining the performance parameters of chips on a wafer, and building a multi-dimensional hyperplane based on the number of terms of the performance parameters; based on the performance parameters of the chips on the wafer, mapping the chips on the wafer to the established hyperplane; based on a machine learning clustering analysis algorithm, grouping the chips mapped to the hyperplane; and according to a grouping result, selecting the chips in the same group to carry out chip packaging on the same module or lining plate. Performance parameters of the chip comprise threshold voltage, saturation voltage drop and cut-off current. The dimension of the multi-dimensional hyperplane is the same as the number of performance parameter items of the chip. According to the invention, the performance parameters of each chip on the same module or lining plate can be ensured to be consistent, and the use stability of the module or lining plate is effectively ensured.

Description

technical field [0001] The invention relates to the field of chip packaging, in particular to a method and system for automatic grouping and packaging of chips based on machine learning. Background technique [0002] In the process of packaging multi-chips into modules, usually a module contains multiple chips of the same type. The chips in the same module should have the same performance in theory, but due to a small amount of fluctuations in the chip manufacturing process, resulting in the same The performance of the chips in the batch will also have a little deviation from each other. Under normal circumstances, this deviation can be ignored, but in some applications that are more stringent, such as automotive inverter IGBT (Insulated Gate Bipolar Transistor, Insulated gate bipolar transistor) module, if the performance deviation between the chips in the module is large, it may cause the output current of some chips to be too large, the output current of some chips to be ...

AI Technical Summary

Problems solved by technology

[0004] However, the existing method of grouping chips according to fixed values ​​is too simple. Chips in the same group that are close to the upper and lower limits of the group may have a larger gap than the chip parameters of other groups. group chips, but the consistency is very poor, and the existing classification data only has one dimension of threshold voltage, which only considers the consistency of threshold voltage, and does not consider other parameter dimensions such as voltage drop consistency and leakage current consistency, resulting in the Low stability

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