59 results about "Saturation voltage" patented technology

Magnetic saturation detectors for power converters are presented herein. An energy transfer element has an input power winding wrapped around a center post. Single or multiple transverse windings are positioned perpendicular to the input power winding and coupled to receive a transverse current that provides a transverse magnetic flux density within the energy transfer element. The transverse magnetic flux density produces a transverse voltage waveform. A voltage detection circuit is configured to receive the transverse voltage waveform and detect a change in the sign of the slope of the transverse voltage waveform. The change in the sign of the slope indicates magnetic saturation. The voltage detection circuit is configured to detect an occurrence of an extremum in the transverse voltage waveform. The extremum indicates the change in the sign of the slope.

A light emitting diode (LED) driving system comprises at least one linear current driver configured to regulate current to a plurality of LEDs in a multi-spectral application independently of an electrical load affected by voltage fluctuations across the LEDs; and a programmable input configured to receive a current setpoint signal from a digital-to-analog converter (DAC), which defines a target current through the LEDs. The LED driving system further comprises a programmable voltage regulator configured to output a supply voltage to the least one linear current driver that includes a saturation voltage sufficient for the at least one linear current driver to regulate the current delivered to the plurality of LEDs.

The invention discloses an NPC converter closed-loop feedback data driven IGBT saturation voltage drop monitoring method, and relates to the field of electronic power device state monitoring, and the method comprises the steps: collecting the operation data of an NPC energy storage converter; performing analog-to-digital conversion on the acquired operation data; performing data cleaning on the operation data; deriving a mathematical model of the energy storage converter, and substituting the processed data into the mathematical model; performing curve fitting, calculating an objective function, searching an optimal solution to minimize the objective function, and obtaining an identification voltage drop parameter of the IGBT; according to an IGBT output characteristic curve, extracting parameters in a healthy state, and comparing the parameters with identification parameters to carry out state evaluation; a parameter self-correction or online correction mechanism is introduced; classifying the health states of the IGBTs through normal distribution; and online evolution evaluation and abnormity early warning of the device state are realized. By the adoption of the method, the actual IGBT state and behavior are simulated through the digital model, and therefore predictive maintenance is achieved.

The invention discloses an IGBT device, a preparation method and a preparation system thereof, and a storage medium. The device comprises a substrate; the second groove region and the first groove region are formed in the substrate; the semi-insulating material layer is formed in the first groove region and the second groove region; a CS layer, a Pwell layer and an NSD layer; a contact hole penetrating from top to bottom; the contact hole is filled with a metal contact layer. According to the invention, the first groove region and the second groove region are formed on the side wall of the first HM layer, gate oxidation, polysilicon filling and the second HM layer are carried out in sequence, ion implantation and annealing are carried out, and the gate oxide layer between the grooves is used as a barrier mask to realize etching of the contact hole. The method is suitable for forming the contact hole under the condition that the cellular mesa is small, photoetching sleeve deviation between the contact hole and the groove can be effectively avoided, so that the in-chip consistency of saturation voltage drop is greatly improved, and meanwhile, a wider upper opening can be formed so as to be beneficial to further reducing the conduction voltage drop of a device.

The invention discloses a silicon carbide intelligent power module with voltage and current dual-detection over-current protection, and relates to the technical field of semiconductors. In order to solve the problem that when an existing silicon-based intelligent power module (IPM) is matched with a silicon carbide metal-oxide-semiconductor field effect transistor, due to the fact that the over-current protection response speed is low, interference and false triggering are likely to happen, a dual over-current protection mechanism combining desaturation voltage detection and sub-current detection is adopted. And by mixing and integrating the silicon substrate and the silicon carbide power device, the performance requirements of different application scenes are considered. Three driving control chips, six IGBT chips, six fast recovery diode chips, one SiC MOSFET chip, two silicon carbide Schottky barrier diode chips and one patch sampling resistor are integrated in the module, and all the elements are packaged in the same insulation heat dissipation substrate and lead frame combined structure, so that high integration level, high reliability and fast overcurrent protection are realized; the method can be widely applied to the fields of household appliances, industrial control, new energy and the like.

The invention provides a power device state monitoring method and device based on an FPGA, and belongs to the field of power electronics. According to the method, the parallel processing capability of the FPGA is utilized to realize real-time monitoring of a plurality of state quantities, including actual saturation voltage drop, junction temperature and collector current, of the power device, the state quantities are converted into corresponding digital signals, and then based on pre-stored electrical characteristic information of the power device, the converted digital information is judged, so that the state quantities of the power device are monitored in real time. And obtaining a degradation state monitoring result of the packaging-level bonding wire of the power device, then displaying the state monitoring result, and carrying out early warning in time. According to the method, the degradation state of the packaging-level bonding wire of the power device can be accurately and rapidly evaluated based on the real-time state quantity of the power device, the monitoring requirement of the state of the power device is met, the monitoring precision and the response speed are improved, and the stability and reliability of a power electronic system are enhanced.

The application belongs to the technical field of short-circuit protection circuit, and discloses a short-circuit protection circuit and system using a back-saturation logic control, which comprises an upper and lower bridge back-saturation voltage sampling unit, an upper and lower bridge back-saturation voltage comparison unit, an upper and lower bridge back-saturation high and low voltage signal isolation integration unit, an upper and lower bridge back-saturation low voltage signal driving integration unit and a main power unit. The application increases an AND gate circuit at the output end of the back-saturation judgment circuit of each upper and lower bridge of the silicon carbide MOSFET, so that only when the upper and lower bridges both trigger back-saturation, the short-circuit protection is triggered. When only the upper or lower bridge single MOSFET tube triggers back-saturation, the short-circuit protection time still follows the existing protection parameters, that is, false positives caused by the fast opening of the silicon carbide and the interference of system noise are avoided.

The invention relates to a driving system, a circuit board with a first circuit and heating and ventilation equipment, and belongs to the technical field of electronics. The driving system comprises two first circuits and a driving circuit. Each first circuit is used for electrically connecting two lead terminals of one stator coil in the stepping motor, and the first circuit comprises a sub-module circuit; and the driving circuit is used for driving the two first circuits to control the stepping motor. The first circuit comprising the sub-module circuit is adopted to control the stepping motor, the current mainstream four-path Darlington circuit is replaced to control the two-phase five-wire unipolar stepping motor, the sub-module circuit has the core characteristic of improving the current amplification capability, and is provided with a high-current gain circuit, and the sub-module circuit is provided with a high-current gain circuit. And meanwhile, the saturation voltage drop problem of a traditional Darlington circuit is reduced, and compared with a conventional Darlington tube, the conduction loss of the sub-module circuit is low, so that the power consumption of a driving system can be reduced, and the power consumption of the whole heating and ventilation equipment is further reduced.

The application provides an insulated gate bipolar transistor and a manufacturing method thereof, and relates to the fields of semiconductor power devices and manufacturing. In order to effectively reduce the on-voltage drop, the hole concentration in the N-type charge storage layer will significantly increase, which will cause the field intensity in the N-type charge storage layer to exponentially increase when the insulated gate bipolar transistor is in reverse blocking, and the collector-emitter reverse blocking voltage to decrease. In the embodiment, a part of the conductive channel is replaced by a first P+ region, the introduction of the first P+ region can make the field intensity in the N-type charge storage layer decrease and share the rising field intensity with the N-drift region. However, the introduction of the first P+ region will reduce the conductance modulation effect of the N-type charge storage layer, so the N+ intercepting region, the trench intercepting region and the hole extraction region arranged along the extension direction of the trench in the first P+ region are repeatedly arranged, the extraction rate of the key carrier holes is artificially adjusted, and the balance problem of the saturation voltage drop, the reverse cut-off voltage, the short circuit characteristic and the switching speed can be solved.

An auxiliary circuit (200b) for a power transistor (T2) control device, the auxiliary circuit (200b) being configured to connect to the gate and drain of the gate transistor (T2), the auxiliary circuit (200b) being configured to receive from a main circuit (200a) at least one switching command (OUT_H, OUT_B) and output a gate control (GRDV), the auxiliary circuit (200b) being configured to output a nominal desaturation voltage (DESAT), the auxiliary circuit (200b) comprising at least one auxiliary comparator circuit (224) configured to compare a voltage representative of a drain voltage (VDS) to an advanced desaturation threshold (Vth) so as to achieve early desaturation detection, the auxiliary circuit (200b) being configured to modify the gate control (GDRV) upon early detection. Abstract Figure: Figure 5

The present invention relates to a micro-trench power device with low warpage stress. For any micro-trench cell, the device comprises a first-type trench unit and a second-type trench unit. Within each first-type trench, a first-type conductive polysilicon and an in-trench insulating dielectric layer are disposed. The second-type conductive polysilicon is in ohmic contact with a front-side first electrode metal located above the front surface of a semiconductor substrate. The first-type conductive polysilicon is electrically connected to a front-side second electrode metal located above the front surface of the semiconductor substrate, and the second-type conductive polysilicon is insulated and isolated from the front-side first electrode metal via the in-trench insulating dielectric layer. The present invention can reduce stress during the processing of micro-trench power devices, avoid contact hole photolithography offset caused by warpage, and achieve highly consistent threshold voltage and saturation voltage drop.

The invention discloses a submicron micro-groove IGBT (Insulated Gate Bipolar Translator), which belongs to the technical field of power semiconductor devices and comprises a substrate, a plurality of grooves and a contact assembly, comprising a Gate groove and a virtual groove, the Gate groove and the virtual groove are isolated from a substrate through an oxide layer, the Gate groove adopts a multi-groove parallel connection and non-full-channel structure, the non-full-channel is a single-side channel only arranged beside two outer side Gate grooves in the parallel connection structure, and the two single-side channels are arranged in a bilateral symmetry mode; each contact assembly is composed of a contact hole and heavy doping, the contact assemblies are arranged on the two outer sides of the Gate groove parallel structure, the contact assemblies on the two outer sides are arranged in a bilateral symmetry mode, and the device has the advantages that the parasitic resistance is reduced through multi-Gate parallel connection, the current density is reduced while the current loss is reduced through non-full-channel optimization; the outer side contact assembly reduces contact electrical impedance latch, the virtual groove ensures low saturation voltage drop, the micro-scale structure is compatible, and the technical effects of low loss, high reliability and wide adaptability are achieved.

The invention discloses a desaturation short-circuit protection circuit and method of a power switching device and a new energy vehicle, and relates to the technical field of motor controllers, the desaturation short-circuit protection circuit of the power switching device comprises a driving module, a divider resistor and a diode, the driving module comprises a switching tube and a comparator, and a time delay module is arranged in the switching tube; the driving module is used for controlling the switching tube to be switched off under the condition that the actual conduction duration of the switching tube reaches the target conduction duration; the divider resistor is used for dividing voltage to obtain desaturation voltage of the driving module after the switching tube is switched off; and the driving module is also used for controlling the comparator to turn over under the condition that the desaturation voltage is greater than a preset comparator turn-over voltage threshold value so as to start desaturation short-circuit protection on the power switch device. The circuit provided by the invention can quickly respond to short-circuit protection of the power switch device on the basis of ensuring low power consumption and high robustness.

The invention discloses a preparation method of an IGBT device. The IGBT device comprises a substrate, an interlayer dielectric layer, a metal barrier layer, a metal layer, a first passivation layer, a second passivation layer, an alloy processing substrate and a semiconductor device area. The stress in the semiconductor device is released through alloying treatment after photoetching, the problem that the stress of a boron-free phosphorosilicate glass IGBT device is too large in the related technology is solved, due to the fact that the stress is reduced, the channel opening of the IGBT device is more sufficient under the low opening voltage, the problem that the saturation voltage drop of a collector and an emitter is discrete is effectively solved, and the reliability of the IGBT device is improved. The stability and the consistency of the IGBT device are improved, and the performance and the reliability of the whole circuit can be improved; the passivation layer is changed from a single silicon-rich silicon nitride layer to the combined film layer of the silicon nitride layer and the silicon-rich silicon nitride layer, so that the problem of small black spots in the subsequent newly-added alloying treatment process is avoided, the structure of the combined film layer is more stable, and the durability and reliability of the device are improved.

The invention discloses an IGBT (Insulated Gate Bipolar Translator) driving control method based on secondary side hardware protection and active clamping, which comprises the following specific steps of: establishing an IGBT digital twin model, and updating junction temperature distribution, saturation voltage drop and theoretical boundaries of a dynamic safe working area under different working conditions in real time through model simulation; in the normal switching process of the IGBT, voltage waveforms and current change rate waveforms in the switching-on and switching-off stages of the IGBT are collected in real time, key parameters are identified, and meanwhile self-adaptive correction is carried out; according to the invention, the conversion from passive protection to active prediction can be realized, the accuracy of protection criteria is greatly improved, the voltage stress and loss of a device are remarkably reduced, false triggering and misjudgment are reduced, the self-diagnosis capability and response speed of a system are improved, the time precision and coordination of protection decisions are ensured, and the reliability of the system is improved. Thermal fatigue and breakdown risks caused by overstress are reduced, so that the service life of the device is prolonged, and the overall reliability and operation efficiency of the power module are improved.

The invention discloses a junction temperature online monitoring circuit, method and system based on a large-current saturation voltage drop method, and relates to the technical field of electronics. The monitoring circuit comprises a high-voltage isolation circuit, a low-pass filter circuit and an analog isolation circuit which are sequentially connected in series; the high-voltage isolation circuit is used for being connected with an IGBT to output a measurement signal used for measuring the junction temperature, then the measurement signal passes through the low-pass filter circuit to ensure that a low-frequency-band signal lower than the cut-off frequency passes through, a signal higher than the cut-off frequency is filtered out, and then the measurement signal processed by the filter passes through the analog isolation circuit to obtain the junction temperature. On one hand, electromagnetic interference on the measurement signal is reduced, and on the other hand, the measurement signal is converted into analog quantity to be input into the measurement equipment, so that the measurement equipment obtains the junction temperature of the IGBT through the measurement signal. According to the invention, the junction temperature measurement precision can be improved.

The utility model provides a voltage drop testing device for a chopper module and a three-level module, which relates to the technical field of voltage drop testing, and comprises a voltage adjustable power supply, two ends of which are connected to a voltage applying point of the chopper module or the three-level module; two ends of the adjustable current source are connected to a power supply input point of the chopping module or the three-level module; and two ends of the voltage drop detector are connected to voltage drop detection points of the chopping module or the three-level module, and a value measured by the voltage drop detector is a saturation voltage drop test value. The beneficial effects are that a collector and an emitter of a single IGBT in the chopper module and the three-level module are taken as a voltage application point and a voltage drop detection point, a power supply input point is respectively connected with a voltage adjustable power supply, a voltage drop detector and an adjustable current source, and current and voltage are adjusted to carry out voltage drop test; and a saturation voltage drop test value under a high-current condition can be accurately measured.

Various methods and circuital arrangements for reducing a turn ON time of a cascode amplifier are presented. According to one aspect, a configurable switching arrangement coupled to a cascode transistor of the amplifier shorts a gate of the cascode transistor to a reference ground during an inactive mode of operation of the amplifier. During an active mode of operation of the amplifier, the configurable switching arrangement couples a gate capacitor to the gate of the cascode transistor that is pre-charged to a voltage that is higher than a gate biasing voltage to the cascode transistor, which ensures that cascode transistor turns ON much quicker than the traditional method of grounding the cap, hence provide a final current flow through the cascode amplifier in a shorter time by not limiting the turn ON time of the input transistor. The gate biasing voltage is coupled to the gate capacitor via a resistor. A relationship between the pre-charged voltage, and minimum saturation voltages and threshold voltages of the transistors of the cascode amplifier is also provided.

The present disclosure provides a low noise, low switching loss, and emitter-collector saturation voltage V CE An object of the present invention is to provide a semiconductor device capable of suppressing an increase in (sat). [Solution] A semiconductor device according to the present disclosure comprises a two-stage active dummy trench having a first upper electrode and a first lower electrode, and a two-stage active trench having a second upper electrode and a second lower electrode, the first upper electrode, the second upper electrode, and the second lower electrode being connected to the same gate pad, the two-stage active dummy trench and the two-stage active trench extending horizontally in a plan view, and within the overall horizontal length of the two-stage active dummy trench and the two-stage active trench, the length of the region where the two-stage active dummy trench and the two-stage active trench are adjacent is longer than the length of the region where the two-stage active dummy trench and the two-stage active trench are not adjacent.

The utility model discloses a power supply control circuit and an electronic device, the power supply control circuit is arranged between a battery and a load system, and the power supply control circuit comprises a pre-stage FET module used for switching on / off the output of a DC power supply; the voltage reduction module is connected with the pre-stage FET module, the battery and the load system, and the voltage reduction module is used for performing voltage reduction on the DC power supply and then outputting the DC power supply to the battery and the load system; the post-stage FET module is connected with the battery, the load system and the voltage reduction module, and the post-stage FET module is used for switching on and off the output of the battery to the load system; and the control module is connected with the front-stage FET module, the rear-stage FET module, the voltage reduction module, the battery and the load system, and the control module is used for controlling the front-stage FET module to turn off the output of the DC power supply when detecting that the voltage of the battery is greater than or equal to the saturation voltage and receiving a standby signal of the load system, and simultaneously controlling the rear-stage FET module to turn on the output of the battery. The power supply control circuit can reduce the power consumption after the system enters the standby state when the battery is fully charged, and effectively reduces the power consumption of the system.

The invention discloses a welding type IGBT aging online prediction method fusing an analytic physical model and deep learning, and the method comprises the following steps: collecting temperature-sensitive electrical parameters of an IGBT module in real time, the temperature-sensitive electrical parameters including saturation voltage drop, collector current, shell temperature, current stress and voltage stress; inputting the temperature-sensitive electrical parameters into a pre-trained deep neural network model, and outputting the junction temperature of the IGBT; processing the junction temperature fluctuation data by adopting a dynamically updated online rain flow counting method, and counting the junction temperature fluctuation quantity in an equivalent period in real time; inputting the junction temperature fluctuation quantity into a service life prediction model based on a Coffin-Manson equation, and calculating a failure cycle number; accumulating the damage amount based on a linear accumulated damage theory; when the damage amount reaches a first threshold value, early warning is triggered, when the damage amount reaches a second threshold value, failure is judged, and the remaining service life is predicted according to the current damage amount.

The invention discloses a high-conductivity insulated gate bipolar transistor with multiple deep trench insulating columns and a manufacturing process thereof, and relates to the technical field of power semiconductor manufacturing, the high-conductivity insulated gate bipolar transistor comprises an emitter end and a collector end, the emitter end comprises an emitter region, a base region and an insulating layer, and trench gates are arranged on two sides of the base region; the emitter end further comprises a potential floatable P-type region and a plurality of deep trench insulating columns therein; the P-type region is formed by doping P-ions on the side wall and the bottom of the insulating column groove, and the deep groove insulating column is filled with an insulating material; the emitter region comprises two N + emitter regions and a P + region between the N + emitter regions. The processing difficulty of the potential floatable P-type region is reduced by increasing the number of the insulating columns, performing side wall ion implantation and backfilling an insulating material process, and the process reliability is improved; according to the structure, low saturation voltage between the collector electrode and the emitter electrode is realized by changing the flow direction of holes, excessive carriers at the emitter electrode are reduced, the switching time is shortened, the switching loss is reduced, the electric field intensity at the bottom of the grid electrode can be reduced, and the breakdown voltage is improved.

The present disclosure aims to provide a semiconductor device capable of improving gate breakdown voltage and lowering saturation voltage. [Solution] The semiconductor device according to the present disclosure comprises a semiconductor substrate, a base layer of a first conductivity type provided on the surface side of the semiconductor substrate, and a trench provided on the surface side of the semiconductor substrate that penetrates the base layer and has an upper electrode covered with an upper oxide film, a lower electrode covered with a lower oxide film, and a boundary oxide film located between the upper electrode and the lower electrode. The upper electrode has a concave shape on the surface facing the lower electrode and has a pointed portion that constitutes the concave shape, the pointed portion has a shape that extends in the width direction of the trench, the pointed portion and the lower electrode face each other in the width direction of the trench, the thickness of the upper oxide film is constant along the base layer and the layer below the base layer, and the thickness of the boundary oxide film is thicker than the thickness of the upper oxide film.

The present application discloses a transistor and a display panel. The transistor comprises a gate, an active layer, a first electrode, and a second electrode. By forming a Schottky contact between the first electrode of the transistor and a first sub-area within a first overlapping area, a Schottky barrier can be introduced at the contact surface of the first sub-area, and carriers must overcome the Schottky barrier when entering the first sub-area from the first electrode, so that the flow of the carriers within the first sub-area can be controlled, thereby reducing the saturation voltage, and thus reducing the power consumption of a driving circuit or a display panel to which the transistor is applied. In addition, by forming an ohmic contact between the first electrode of the transistor and a second sub-area within the first overlapping area, a low resistance at the contact surface of the second sub-area can be ensured, so that it can be ensured that the carriers can more easily enter the second sub-area from the first electrode, thereby increasing the on-state current of the transistor.

This document presents a magnetic saturation detector for a power converter. An energy transfer element has an input power winding wound around a central leg. One or more transverse windings are positioned perpendicular to the input power winding and coupled to receive a transverse current, which provides a transverse magnetic flux density within the energy transfer element. The transverse magnetic flux density generates a transverse voltage waveform. A voltage detection circuit is configured to receive the transverse voltage waveform and detect a change in the sign of the slope of the transverse voltage waveform. This change in the sign of the slope indicates magnetic saturation. The voltage detection circuit is configured to detect the occurrence of an extreme value in the transverse voltage waveform. The extreme value indicates a change in the sign of the slope.

An object of the present disclosure is to provide a semiconductor device which is low in noise and low in switching loss, and which is capable of suppressing an increase in saturation voltage VCE (sat) between an emitter and a collector. This semiconductor device is provided with: a double-layer active dummy trench having a first upper layer electrode and a first lower layer electrode; and a double-layer active trench having a second upper-layer electrode and a second lower-layer electrode, the first upper-layer electrode, the second upper-layer electrode, and the second lower-layer electrode being connected to the same gate pad, the double-layer active dummy trench and the double-layer active trench extending in the horizontal direction in plan view. The length of a region in which the double-layer active dummy trench and the double-layer active trench are adjacent is longer than the length of a region in which the double-layer active dummy trench and the double-layer active trench are not adjacent in the full length of the double-layer active dummy trench and the full length of the double-layer active trench in the horizontal direction.

Various methods and circuital arrangements for reducing a turn ON time of a cascode amplifier are presented. According to one aspect, a configurable switching arrangement coupled to a cascode transistor of the amplifier shorts a gate of the cascode transistor to a reference ground during an inactive mode of operation of the amplifier. During an active mode of operation of the amplifier, the configurable switching arrangement couples a gate capacitor to the gate of the cascode transistor that is pre-charged to a voltage that is higher than a gate biasing voltage to the cascode transistor, which ensures that cascode transistor turns ON much quicker than the traditional method of grounding the cap, hence provide a final current flow through the cascode amplifier in a shorter time by not limiting the turn ON time of the input transistor. The gate biasing voltage is coupled to the gate capacitor via a resistor. A relationship between the pre-charged voltage, and minimum saturation voltages and threshold voltages of the transistors of the cascode amplifier is also provided.

The present application relates to the technical field of radiation measurement with ionization chamber, and particularly relates to a radiation test method and system for a medical cyclotron. The present application firstly analyzes the change characteristics of the output current curve under the condition of the change of the polarization voltage, evaluates the saturation voltage probability coefficient of the output current curve segment corresponding to the ideal polarization voltage, then combines the ionization interference factors such as the ionization chamber environment and the change of the beam intensity of the particle beam, evaluates the radiation confidence of each output current accurately reflecting the radiation intensity, then screens and corrects the to-be-corrected current, obtains the ideal output current correction curve, and further improves the radiation test accuracy of the medical cyclotron.

This application discloses a method, apparatus, device, and medium for parameter identification of a synchronous motor. The method includes: obtaining the steady-state value of the synchronous motor under a given voltage and the measured value of the bus voltage by varying the carrier frequency; obtaining the stator resistance of the synchronous motor and the saturation voltage error of the inverter using a target converter circuit model of the inverter and the synchronous motor and multiple sets of measured values; injecting a low-frequency sinusoidal current into the synchronous motor, and determining the current corresponding to the minimum ratio of the third harmonic amplitude to the fundamental amplitude of the synchronous motor at the given voltage as the bias current identification result of the inverter; when the direct and quadrature axes of the synchronous motor have saturation characteristics, obtaining the maximum peak point of its response current spike under the second harmonic and the zero-crossing point of the fundamental wave, injecting positive and negative voltage pulses into these two points respectively, and determining the type of synchronous motor and the direct and quadrature axis inductance based on the peak value of the response current. This method can improve the accuracy of synchronous motor parameter identification.

This application provides an open-drain output circuit and chip. The open-drain output circuit includes a driving transistor, a first isolation transistor, a second isolation transistor, a control circuit, and an output port. Both the first and second isolation transistors include a body diode. The first isolation transistor conducts when the voltage at the output port is positive and greater than the forward voltage of the body diode in the first isolation transistor, allowing the pull-down current at the output port to flow to system ground through the first isolation transistor and the driving transistor. The second isolation transistor is controlled to conduct when the voltage at the output port is positive and lower than a preset threshold, allowing the pull-down current at the output port to flow to system ground through the second isolation transistor and the driving transistor. The forward voltage of the body diode in the first isolation transistor is less than the preset threshold. The minimum saturation voltage of the open-drain output circuit provided in this application meets the requirements of automotive-grade chips.