Embedded word line structure preparation method
A buried word line and trench technology, used in semiconductor/solid-state device manufacturing, static memory, instruments, etc., can solve the problem of uneven etching of semiconductor substrates, difficult to control the etching environment, and easy access to the bottom of the first trench. Problems with tips or glitches
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[0045] In order to facilitate the understanding of the present invention, the present invention will be described more fully below with reference to the associated drawings. A preferred embodiment of the invention is shown in the drawings. However, the present invention can be embodied in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided so that the disclosure of the present invention will be thorough and complete.
[0046] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the technical field of the invention. The terms used herein in the description of the present invention are for the purpose of describing specific embodiments only, and are not intended to limit the present invention. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.
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