Multiplication device based on nonvolatile memory

Abstract

The invention provides a multiplication device based on a nonvolatile memory. The multiplication device comprises a data storage circuit and a voltage drop circuit, the data storage circuit comprises a nonvolatile memory, two ends of the nonvolatile memory are respectively connected to a bit line BL and a bit line BLB of the data storage circuit, the nonvolatile memory comprises at least two storage units, and the storage units are connected in series; the voltage drop circuit is connected to a bit line BLB of the data storage circuit through a transistor; one end of the bit line BL is connected with a high level to enable the nonvolatile memory to discharge to the bit line BLB to generate a first electric signal, the bit line BLB is connected with a low level, the voltage drop circuit controls the bit line BLB to be grounded through a transistor to generate a second electric signal, and multiplication is realized according to the first electric signal and the second electric signal. According to the multiplication device based on the nonvolatile memory, provided by the invention, multi-bit multiplication can be realized in the nonvolatile memory with a relatively low switch ratio.

Description

technical field [0001] The invention relates to memory technology, in particular to a multiplication device based on non-volatile memory. Background technique [0002] Deep neural network is a very popular direction in the field of artificial intelligence in recent years. The core idea of ​​this technology comes from the hierarchical processing mechanism of the brain. Data is processed through continuous multiplication and addition operations, which can be widely used in image classification and natural language. Processing, autonomous driving and other fields. With the explosive growth of computer data in recent years, deep neural networks have higher and higher performance requirements for computing systems. The current computing platform is mainly based on the von Neumann architecture, that is, the computing unit and data are separated. In the instruction execution stage, the processor obtains data from the memory through the bus according to the instruction, and after ...

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Problems solved by technology

However, this scheme uses analog signals to select the corresponding memory cells. In the case of a relatively large memory array, many different analog signals need to be generated for selection. Therefore, the signal margin may be small, making it difficult to accurately distinguish signals

[0006] Therefore, for some non-volatile memories with low switching ratios, it is difficult to implement complex operations such as multiplication in traditional memory arrays

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