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Processor low-power blocking type time delay method and device and readable medium

A processor and low-power technology, applied in the computer field, can solve the problems of high processor power consumption and waste of processor resources, and achieve the effect of reducing power consumption and saving processor resources

Pending Publication Date: 2021-12-31
珠海亿智电子科技有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

As a result, processor resources are wasted and processor power consumption is high

Method used

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  • Processor low-power blocking type time delay method and device and readable medium
  • Processor low-power blocking type time delay method and device and readable medium
  • Processor low-power blocking type time delay method and device and readable medium

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Embodiment Construction

[0020] This part will describe the specific embodiment of the present invention in detail, and the preferred embodiment of the present invention is shown in the accompanying drawings. Each technical feature and overall technical solution of the invention, but it should not be understood as a limitation on the protection scope of the present invention.

[0021] In the description of the present invention, several means one or more, and multiple means two or more. Greater than, less than, exceeding, etc. are understood as not including the original number, and above, below, within, etc. are understood as including the original number.

[0022] In the description of the present invention, the continuous labeling of the method steps is for the convenience of review and understanding. In combination with the overall technical solution of the present invention and the logical relationship between each step, adjusting the implementation order between the steps will not affect the tech...

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PUM

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Abstract

The invention relates to a processor low-power blocking type time delay method and device and a readable medium, and the method comprises the steps: obtaining a first time delay state of a processor, and determining the time delay starting time, the time delay length and the timeout time point of the first time delay state; determining the residual delay duration of the first delay state according to the current time, the time delay length and the timeout time point; and starting a timer, keeping the processor in the first running state in the residual delay time through the timer, and returning the processor to the second running state after the residual delay time is ended. The method has the beneficial effects that processor resources are saved, and the power consumption of the processor during blocking type delay is reduced.

Description

technical field [0001] The invention relates to the field of computers, in particular to a processor low-power blocking delay method, device and readable medium. Background technique [0002] During the operation of the operating system, many scenarios require delays. For example, when the clock is initialized during the system startup phase, it is necessary to wait for the phase-locked loop to stabilize. When the display screen is initialized, it is necessary to wait for the hardware signal to stabilize. There are usually two implementations of delay: blocking delay and non-blocking delay. Blocking delay means that the processor waits in place without switching to other tasks. Task switching cannot occur in many scenarios, such as during interrupt processing, critical sections that can only be accessed by one task at the same time, early stages of startup when the task scheduling function is not ready, etc. If delays are required in these scenarios, blocking methods can on...

Claims

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Application Information

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IPC IPC(8): G06F1/3293G06F1/3206
CPCG06F1/3293G06F1/3206
Inventor 不公告发明人
Owner 珠海亿智电子科技有限公司
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