Semiconductor structure

Abstract

The invention relates to a semiconductor structure. The semiconductor structure comprises a substrate; a dielectric substance, which is arranged on the substrate; an epitaxial layer, which is arranged on the dielectric substance and comprises a first region and a second region, wherein the side wall of the epitaxial layer is aligned with the side wall of the dielectric substance; a source / drain structure disposed on the first region of the epitaxial layer; a vertical stack including nano sheet layers disposed over the second region of the epitaxial layer; and a gate stack disposed on the second region of the epitaxial layer and surrounding the vertically stacked nano sheet layers.

Description

technical field [0001] The present disclosure relates to a semiconductor structure and a manufacturing method thereof. Background technique [0002] Source / drain regions in a fin-based field effect transistor (finFET) are grown from the side surfaces of the fin structure and the top surface of the semiconductor substrate on which the fin structure is formed. During operation, parasitic junction capacitance may form between the source / drain regions and the semiconductor substrate, which degrades the performance of the finFET. Contents of the invention [0003] According to some embodiments of the present disclosure, a semiconductor structure includes: a substrate; a dielectric on the substrate; an epitaxial layer disposed on the dielectric and including a first region and a second region, wherein the sidewalls of the epitaxial layer are aligned with the sidewalls of the dielectric; a source / drain structure disposed on the first region of the epitaxial layer; a vertical sta...

AI Technical Summary

Problems solved by technology

During operation, parasitic junction capacitance may form between the source / drain regions and the semiconductor substrate, which degrades the performance of the finFET

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