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Processor verification method and related device

A verification method, technology of a processor, applied in the field of electronics

Pending Publication Date: 2022-02-18
GUANGDONG OPPO MOBILE TELECOMM CORP LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0002] At present, as the complexity of SOC becomes higher and higher, the challenge of SOC verification is also increasing

Method used

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  • Processor verification method and related device
  • Processor verification method and related device
  • Processor verification method and related device

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Embodiment Construction

[0037] The technical solutions in the embodiments of the present application will be described below with reference to the accompanying drawings.

[0038] In order to better understand the solutions of the embodiments of the present application, the following first introduces related terms and concepts that may be involved in the embodiments of the present application.

[0039] In a specific implementation, electronic devices may include various devices with processor functions, for example, handheld devices (smart phones, tablet computers, etc.), vehicle-mounted devices (navigators, auxiliary reversing systems, driving recorders, car refrigerators, etc.), Wearable devices (smart bracelets, wireless headphones, smart watches, smart glasses, etc.), computing devices or other processing devices connected to wireless modems, and various forms of user equipment (User Equipment, UE), mobile stations (MobileStation , MS), a virtual reality / augmented reality device, a terminal device...

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Abstract

The invention discloses a processor verification method and a related device, and the method comprises the steps: obtaining a target character string of a first programming language through an analog processor, compiling the target character string, and obtaining a target file in an N-ary format, N being a positive integer; loading the target file into a storage space of a first hardware processor through a backdoor access mechanism, transmitting a first address of the storage space where the target character string is located to a second hardware processor, the first hardware processor comprising the simulation processor, the second hardware processor being another hardware processor different from the first hardware processor; and the second hardware processor obtaining the target character string based on the head address in a back gate reading mode. By adopting the embodiment of the invention, co-simulation of two different languages can be realized in a processor verification process.

Description

technical field [0001] The present application relates to the field of electronic technology, and in particular to a method for verifying a processor and related devices. Background technique [0002] At present, as the complexity of SOC becomes higher and higher, the challenge of SOC verification is also increasing. However, there must be a CPU as its brain in the SOC. At this time, it is more appropriate to use the C program as the incentive. It is also the current mainstream CPU, DSP integrated verification and SOC verification method, which can simulate the real behavior of the software in the early stage. [0003] Of course, System Verilog, as the mainstream hardware verification language, is also an essential part of chip verification. When the chip is verified by combining C and System Verilog, the C program is executed by the CPU inside the SOC, and the SystemVerilog environment is executed by the real physical CPU. , the languages ​​of the two sides are different, ...

Claims

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Application Information

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IPC IPC(8): G06F30/398G06F111/02G06F115/02
CPCG06F30/398G06F2111/02G06F2115/02
Inventor 刘金保
Owner GUANGDONG OPPO MOBILE TELECOMM CORP LTD
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