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A grid generation method and device based on improved fork tree algorithm

A grid generation and grid technology, applied in computing, instrumentation, image data processing, etc., can solve problems such as low grid description accuracy, grid structure description graphics that do not conform to the original semiconductor device structure, etc., and achieve high accuracy. , save storage space, position representation accurate effect

Active Publication Date: 2022-05-10
MOYAN COMPUTATIONAL SCI NANJING PTE LTD
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Problems solved by technology

[0005] This application provides a grid generation method and device based on the improved fork tree algorithm, which can be used to solve the problem that the grid structure description graph generated by the existing hybrid grid generation method does not conform to the original semiconductor device structure, and the accuracy of the grid description lower technical issues

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  • A grid generation method and device based on improved fork tree algorithm
  • A grid generation method and device based on improved fork tree algorithm
  • A grid generation method and device based on improved fork tree algorithm

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Embodiment Construction

[0106] In order to make the purpose, technical solution and advantages of the present application clearer, the implementation manners of the present application will be further described in detail below in conjunction with the accompanying drawings.

[0107] In order to solve the technical problem that the grid structure description graph generated by the existing hybrid grid generation method does not conform to the original semiconductor device structure, and the accuracy of the grid description is low, the application discloses a method based on the improved fork tree through the following embodiments Algorithmic mesh generation methods. The grid generation method provided by the embodiment of the present application is applied to the grid description of the semiconductor device structure, figure 1 It exemplarily shows a schematic diagram of the overall process corresponding to a grid generation method based on the improved fork tree algorithm provided by the embodiment of ...

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Abstract

The present application provides a grid generation method and device based on an improved fork tree algorithm. The method includes: performing initial grid generation on the circumscribed cube of the semiconductor device, and if the target volume grid is completely inside the semiconductor device and the volume is greater than a preset threshold, continue to refine until the final internal volume grid that meets the requirements is obtained grid, if the target volume grid intersects with the semiconductor device structure, and the vertices on the intersecting polyhedron are not co-spherical, continue to refine until the final boundary volume grid is obtained, and use the rational number operation of shaping to obtain the position of each grid node , the final generated volume grid includes tetrahedral grid, pyramid grid, triangular prism grid and other hybrid grids with vertices sharing the same sphere. In the whole generation process, the position coordinates of each grid node are generated by using the shaping rational number operation, which can not only save the storage space of the grid node, but also the position representation is more accurate, there is no floating point error, and the accuracy of the grid description is higher.

Description

technical field [0001] The present application relates to the technical field of semiconductor device manufacturing technology, in particular to a grid generation method and device based on an improved fork tree algorithm. Background technique [0002] In order to improve the research and development efficiency of semiconductor device production, process simulation can be used for the device model. During process simulation, grid generation technology can be used to describe the structure of the real semiconductor device. The generated grid can usually be divided into structural network Grids and unstructured grids, structured grids include rectangular grids and hexahedral grids, and unstructured grids include triangular grids and tetrahedral grids. Since the structure of real semiconductor devices is usually an irregular polyhedron, which is relatively complex, if only a single type of grid is used for structural description, it often cannot take into account the requiremen...

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06T17/00G06T17/20
CPCG06T17/005G06T17/205
Inventor 贡顶崔绍春陈雪莲
Owner MOYAN COMPUTATIONAL SCI NANJING PTE LTD
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