Electrostatic discharge protection circuit

Abstract

An electrostatic discharge protection circuit includes an input node, a ground node, a depletion transistor and an enhancement transistor. The enhanced transistor includes a gate contact, a drain contact, and a source contact. The source contact is connected to the gate contact through the depletion type transistor. When the drain contact is connected to the input node, the source contact is connected to the ground node. When the source contact is connected to the input node, the drain contact is connected to the ground node. As the depletion type transistor is small in size, when the electrostatic discharge protection circuit is arranged in a wafer, the space of the wafer can be saved, and the manufacturing cost can be reduced.

Description

technical field [0001] The present disclosure relates to an electrostatic discharge protection circuit, in particular to an electrostatic discharge protection circuit containing a depletion transistor. Background technique [0002] During the process of manufacturing, assembling or testing the semiconductor device, static electricity is often accumulated in the semiconductor device, resulting in electrostatic discharge (ESD). The electrostatic voltage is high, the discharge time is short, and the instantaneous current is large. Therefore, the electrostatic discharge is likely to cause damage to circuit functions and reduce the yield of semiconductor devices. [0003] Therefore, the electrostatic discharge protection circuit can be arranged in the semiconductor device, and the components and circuits in the semiconductor device can be protected from electrostatic discharge damage by conducting the electrostatic discharge current to the ground. However, the known electrostati...

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Problems solved by technology

However, the known electrostatic discharge protection circuit still has some disadvantages, such as bulky

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