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Buffer circuit and delay circuit

A buffer circuit and power supply technology, applied in the circuit field, can solve problems such as poor application effect, buffer circuit speed limit, low operating frequency, etc., and achieve the effect of increasing speed, reducing capacitance, and increasing operating frequency

Pending Publication Date: 2022-04-12
SUZHOU RIGOL PRECISION ELECTRIC TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] However, the speed of the existing buffer circuit is limited, the operating frequency is low, and the application effect is not good in higher frequency occasions

Method used

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  • Buffer circuit and delay circuit
  • Buffer circuit and delay circuit
  • Buffer circuit and delay circuit

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Embodiment Construction

[0034] The present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described here are only used to explain the present invention, but not to limit the present invention. In addition, it should be noted that, for the convenience of description, only some structures related to the present invention are shown in the drawings but not all structures.

[0035] figure 1 A schematic diagram of the circuit structure of a buffer circuit provided by an embodiment of the present invention, refer to figure 1 , the buffer circuit includes: an input terminal, an output terminal and a power supply terminal VCC, the input terminal is used to input a differential signal, the output terminal is used to connect a functional circuit, and the power supply terminal VCC is used to access a power supply; the drive unit 11 is used to respond The input differential signal at the inp...

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Abstract

The invention discloses a buffer circuit and a delay circuit. The buffer circuit comprises an input terminal, an output terminal and a power supply terminal, the input terminal is used for accessing an input differential signal, the output terminal is used for connecting a functional circuit, and the power supply terminal is used for accessing a power supply; the driving unit is used for responding to an input differential signal at the input terminal and generating an output differential signal to the output terminal; the load unit is coupled between the output terminal and a power supply terminal; and the negative capacitance unit is coupled between the power supply terminal and the output terminal and is used for reducing the capacitance of the functional circuit. The working frequency of the buffer circuit can be improved.

Description

technical field [0001] The embodiments of the present invention relate to the technical field of circuits, in particular to a buffer circuit and a delay circuit. Background technique [0002] The buffer circuit can buffer the input signal and then output it, which has the advantages of increasing the driving capability of the circuit and optimizing the waveform, and is widely used in various circuits. [0003] However, the speed of the existing snubber circuit is limited, the operating frequency is low, and the application effect is not good in higher frequency occasions. Contents of the invention [0004] The invention provides a buffer circuit and a delay circuit to increase the working frequency of the buffer circuit. [0005] In a first aspect, an embodiment of the present invention provides a buffer circuit, and the buffer circuit includes: [0006] An input terminal, an output terminal, and a power supply terminal, the input terminal is used to access an input diff...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03K19/018
CPCH03K19/018
Inventor 许强王悦
Owner SUZHOU RIGOL PRECISION ELECTRIC TECH