Cutting layout design method suitable for introducing custom chips and chips prepared therefrom

A layout design and chip technology, applied in manufacturing computing systems, computer-aided design, CAD customization/personalization, etc., can solve the problems of cutting yield and low efficiency, to ensure reliability, improve accuracy and timeliness, Guarantee the effect of layout cutting yield and efficiency

Active Publication Date: 2022-07-22
CHENGDU FUJIN POWER SEMICON TECH DEV CO LTD
View PDF0 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] The purpose of the present invention is to solve the problem of low cutting yield and efficiency caused by the introduction of customized chips in the layout design process, and provide a cutting layout design method suitable for introducing customized chips and chips prepared therefrom

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Cutting layout design method suitable for introducing custom chips and chips prepared therefrom
  • Cutting layout design method suitable for introducing custom chips and chips prepared therefrom
  • Cutting layout design method suitable for introducing custom chips and chips prepared therefrom

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0062] The technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are part of the embodiments of the present invention, but not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.

[0063] In the description of the present invention, it should be noted that "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc. The indicated direction or positional relationship is based on the direction or positional relationship described in the drawings, and is only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the indicated device or element must have a specific orientation or...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention discloses a cutting layout design method suitable for introducing custom chips and a prepared chip, belonging to the technical field of semiconductors. Perform typesetting calculation on the upper limit of the circle's operable area, and output all layout design sketches with through-scribing grooves; perform secondary design on the reserved positions in the layout design sketch according to the custom chip data, and output the secondary layout design sketch. In the present invention, the layout design is firstly performed on the conventional chip, and the layout design sketch with the scribing grooves is obtained, which greatly reduces the risk of secondary cutting. The overall change is controlled to a minimum range, and a layout design sketch compatible with custom chips can be obtained without affecting the conventional chip layout, so as to ensure the layout cutting yield and efficiency.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a cutting layout design method suitable for introducing custom chips and a chip prepared therefrom. Background technique [0002] The layout design of integrated circuits plays a crucial role in the design process of silicon-based semiconductors, and is an important intermediate link in the circuit design and the driving process. As the development of silicon-based power semiconductors in China becomes more and more mature, the requirements for high-yield and high-efficiency layout drawing are gradually emerging, and the layout design of silicon-based power semiconductors with stable and reliable, strong process affinity, easy cutting and picking, and high area utilization rate will be quickly obtained. Help further save chip costs, effectively shorten the chip development cycle, and help products occupy the civilian market faster. [0003] The chip form that can directly...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & AuthorityPatents(China)
IPC IPC(8): G06F30/392H01L27/02G06F113/18G06F111/16
CPCG06F30/392H01L27/0207G06F2113/18G06F2111/16Y02P90/30
Inventor不公告发明人
OwnerCHENGDU FUJIN POWER SEMICON TECH DEV CO LTD