Clock signal synchronization circuit and network communication device
A clock signal and synchronization circuit technology, applied in the field of signal processing, can solve the problems of reducing useful signal bandwidth, difficult to realize real-time accurate synchronization of clock signal, increasing time information frame, etc., to reduce frequency error judgment, accurate alignment, and real-time synchronization Effect
Pending Publication Date: 2022-05-27
NANJING ZHONGXING XIN SOFTWARE CO LTD
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Problems solved by technology
Since this method needs to use the carrier signal, the time information frame is increased and the useful signal bandwidth is reduced
Secondly, the system needs to consume a certain amount of resources to judge the time information in the two devices and make alignment adjustments, which makes it difficult for the two devices to achieve real-time and accurate synchronization of clock signals
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[0024] In order to make the objectives, technical solutions and advantages of the present invention clearer, the present invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention, but not to limit the present invention.
[0025] It should be noted that although the functional modules are divided in the schematic diagram of the device, and the logical sequence is shown in the flowchart, in some cases, the modules may be divided differently from the device, or executed in the order in the flowchart. steps shown or described. The terms "first", "second" and the like in the specification, claims or the above drawings are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence.
[0026] In related technologies, such as figure 1 shown, figure 1 It is a schemati...
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The embodiment of the invention provides a clock signal synchronization circuit and network communication equipment, the first network communication equipment is provided with a first clock generation circuit, a first signal distribution circuit, a first local oscillator circuit and a first interface, and the second network communication equipment is provided with a second interface, a second clock recovery circuit and a second local oscillator circuit; the first clock generation circuit can generate a first reference clock signal and send the first reference clock signal to the first signal distribution circuit, and the first signal distribution circuit can output a first reference signal to the first local oscillator circuit according to the first reference clock signal and output a second reference signal to the second clock recovery circuit through the first interface and the second interface in sequence. The second clock recovery circuit can output a third reference clock signal to the second local oscillator circuit according to the second reference signal. According to the embodiment of the invention, real-time synchronization of clock signals between the first network communication equipment and the second network communication equipment can be realized on the basis of not increasing bandwidth and frequency resources.
Description
technical field [0001] The embodiments of the present invention relate to, but are not limited to, the technical field of signal processing, and in particular, relate to a clock signal synchronization circuit and a network communication device. Background technique [0002] For wireless communication devices, each device is provided with an independent clock module. Since each device has its own independent clock signal, there will be a frequency deviation between the transmitting carrier and the receiving carrier of each device, and there will also be a frequency deviation between the carriers of different channels, and the frequency deviation of the carrier between different channels. It will be superimposed at the receiving end, which will greatly increase the complexity of the frequency offset calibration algorithm at the receiving end. When the frequency deviation is large, the system performance will be degraded, or even the system will not work. In addition, the car...
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IPC IPC(8): H04L27/26
CPCH04L27/266H04L27/261H04L27/26H04J3/06H04L7/04
Inventor 欧杰
Owner NANJING ZHONGXING XIN SOFTWARE CO LTD