Session-based memory operations

Abstract

The application is directed to session-based memory operations. The memory system may determine that a logical address targeted by a read command is associated with a session table. The memory system may write the session table to a cache based on the logical address being associated with the session table. After writing the session table to the cache, the memory system may determine one or more logical-to-physical L2P tables using the session table and write the one or more L2P tables to the cache. The memory system may perform address translation for logical addresses using the L2L table.

Description

[0001] cross reference [0002] This patent application claims US Patent Application Serial No. 17 / 113,999, filed December 7, 2020, by Ambula et al., entitled "SESSION-BASED MEMORY OPERATION." Priority, said US patent application is assigned to the present assignee and expressly incorporated herein by reference in its entirety. technical field [0003] The technical field relates to session-based memory operations. Background technique [0004] Memory systems, such as those including memory devices, are widely used to store information in various electronic devices such as computers, wireless communication devices, cameras, digital displays, and the like. Information is stored by programming memory cells within a memory device to various states. For example, a binary memory cell can be programmed to one of two supported states that often correspond to a logic 1 or a logic 0. In some examples, a single memory cell may support more than two possible states, and the memory ...

AI Technical Summary

Problems solved by technology

Volatile memory cells (eg, DRAM cells) can lose their programmed state over time unless refreshed periodically by an external power source

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