Memory test method, device and system
A memory testing and memory technology, applied in static memory, instruments, etc., can solve the problems of memory storage bit failure and complex memory manufacturing process.
Active Publication Date: 2022-06-21
悦芯科技股份有限公司
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Problems solved by technology
[0002] The manufacturing process of the memory is complicated and there are many procedures. Therefore, many defects in the memory may be caused during the manufacturing process of the memory, for example, causing some storage bits in the memory to fail
Of course, there are also some memories that have normal performance at the beginning of use, but after a period of use, defects are stimulated, which may also lead to the possibility of failure of some storage bits in the memory.
Method used
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[0068] In order to make the purpose, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be described below in conjunction with the drawings in the embodiments of the present application. In addition, it should be noted that like numerals and letters denote similar items in the following figures, therefore, once an item is defined in one figure, it does not need to be further defined and defined in subsequent figures. explain.
[0069] see figure 1 , is a flow chart of the steps of the memory testing method provided by the present application. The memory testing method provided by the embodiment of the present application is applied to memory testing equipment, and the memory testing equipment can be, but not limited to, Field Programmable Gate Array (Field Programmable Gate Array) , FPGA). In addition, it should be noted that the memory testing method provided in...
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The invention relates to the field of design and manufacturing of memories, in particular to a memory testing method, device and system. The memory test method provided by the embodiment of the invention comprises the following steps: generating test data corresponding to each storage bit in a target storage area according to test mode indication information sent by an upper computer, the target storage area being located in a tested memory; for each storage bit in the target storage area, writing the test data corresponding to the storage bit into the storage bit; reading actual data from each storage bit in the target storage area; and comparing the test data corresponding to each storage bit in the target storage area with the actual data to obtain an address failure test result. According to the memory test method provided by the embodiment of the invention, the address failure test of the tested memory can be realized, and the address failure test efficiency of the tested memory can be ensured.
Description
technical field [0001] The present application relates to the field of memory design and manufacture, in particular, to a memory testing method, device and system. Background technique [0002] The manufacturing process of the memory is complicated and there are many procedures. Therefore, many defects in the memory may be caused during the manufacturing process of the memory, for example, some storage bits in the memory may become invalid. Of course, some memories have normal performance at the initial stage of use, but after a period of use, defects are stimulated, which may also lead to the possibility of failure of some storage bits in the memory. Contents of the invention [0003] The purpose of the present application is to provide a memory testing method, device and system to solve the above problems. [0004] The memory testing method provided in the embodiment of the present application includes: [0005] According to the test mode indication information sent by...
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CPCG11C29/56008G11C2029/5604
Inventor 崔荣熏钱黄生刘金海
Owner 悦芯科技股份有限公司