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N-bit s-word multi-state programmable storage circuit based on memristor array and use method of n-bit s-word multi-state programmable storage circuit

A storage circuit and memristor technology, applied in the field of memristor arrays, can solve the problems of data loss, high cost, and inability to hold data in the memory, and achieve the effects of convenient control, good applicability, and port resource saving

Inactive Publication Date: 2022-07-05
山西职业技术学院
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0002] Traditional field effect transistors and transistors only have two resistance states, high and low. Therefore, when using and forming a memory array, data information only exists in the memory array in the form of 1 and 0, and some memories will disappear after power off. It is impossible to keep data, and data loss is prone to occur. In addition, when storing a large amount of data, the computing resources and logic resources occupied are very large, and often have higher costs.

Method used

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  • N-bit s-word multi-state programmable storage circuit based on memristor array and use method of n-bit s-word multi-state programmable storage circuit
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  • N-bit s-word multi-state programmable storage circuit based on memristor array and use method of n-bit s-word multi-state programmable storage circuit

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Embodiment Construction

[0027] The present invention will be further described below in conjunction with the accompanying drawings. Obviously, the described embodiments are some, but not all, embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.

[0028] The structure of the n-bit s-word multi-state programmable memory circuit based on the memristor array provided by the present invention is as follows: figure 2 As shown, the main part includes several rows and columns of memristor arrays {m}, each memristor cell is structured as figure 1 As shown, it includes code Cod, memristor m, resistor R, diodes VD1 and VD2; the code Cod, memristor m and resistor R are connected in series in sequence, and the other end of the code Cod is connected to the address register Cod_address_reg, and the input pulse signal Vs p...

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Abstract

The invention discloses an n-bit s-word polymorphic programmable storage circuit based on a memristor array and a use method. Each memristor unit comprises a code Cod, a memristor m, a resistor R, a diode VD1 and a diode VD2. The code Cod, the memristor m and the resistor R are sequentially connected in series, the other end of the code Cod is connected with the address register Codaddressreg, and an input pulse signal Vs is connected with the code Cod through the address register Codaddressreg; the other end of the resistor R is connected with an external pulse signal Vd; a grounded MOS tube T4 is also arranged between the external pulse signal Vd and the resistor R; the anode of the diode VD1 is connected between the memristor m and the resistor R, and the cathode of the diode VD1 is connected with the input end of the voltage follower; the positive electrode of the diode VD2 is connected with a bit signal output by the n-bit address selector, and the negative electrode of the diode VD2 is connected between the code Cod and the memristor m; according to the requirements of different stages, forward and reverse bidirectional coding, erasing and reading can be realized by adjusting the MOS transistor T4, and the problem of waste of port resources of a traditional reading circuit is solved.

Description

technical field [0001] The invention relates to the technical field of memristor arrays, in particular to an n-bit s-word polymorphic programmable memory circuit based on a memristor array and a method for using the same. Background technique [0002] Traditional field effect transistors and transistors have only two resistance states, high and low. Therefore, when using and forming a memory array, data information only exists in the memory array in the form of 1 and 0, and part of the memory is lost after power off. It is impossible to keep data, and data loss is prone to occur. In addition, when a large amount of data is stored, the occupied computing resources and logic resources are very expensive, and often have higher costs. [0003] Compared with traditional devices, memristors are ideal devices with rich resistance states, which can be determined by encoding "pulse signal stimulation", which has a very significant impact on memory circuits. How to store more informa...

Claims

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Application Information

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IPC IPC(8): G11C13/00
CPCG11C13/0069G11C13/0097Y02D10/00
Inventor 张粮童祎肖建
Owner 山西职业技术学院
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