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SoC chip verification system, verification method and device based on FPGA cluster

A technology for verifying systems and chips. It is applied to architectures, instruments, and general-purpose stored program computers with a single central processing unit. It can solve problems such as prototype verification limitations and inability to SoC chip prototype verification.

Active Publication Date: 2022-07-12
BEIJING INST OF REMOTE SENSING EQUIP
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  • Application Information

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Problems solved by technology

[0003] However, due to the limitation of prototype verification caused by the lack of resources of FPGA itself, the existing solution of using FPGA to design SoC chips for verification cannot carry out prototype verification of large-scale SoC chips

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  • SoC chip verification system, verification method and device based on FPGA cluster
  • SoC chip verification system, verification method and device based on FPGA cluster
  • SoC chip verification system, verification method and device based on FPGA cluster

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Embodiment Construction

[0036] In order to make the purposes, technical solutions and advantages of the embodiments of the present disclosure clearer, the technical solutions in the embodiments of the present disclosure will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present disclosure. Obviously, the described embodiments These are some, but not all, embodiments of the present disclosure. Based on the embodiments in the present disclosure, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present disclosure.

[0037] In addition, the term "and / or" in this article is only an association relationship to describe the associated objects, indicating that there can be three kinds of relationships, for example, A and / or B, it can mean that A exists alone, A and B exist at the same time, There are three cases of B alone. In addition, the character " / ...

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Abstract

The embodiment of the invention provides an SoC (System on Chip) chip verification system, verification method and device based on an FPGA (Field Programmable Gate Array) cluster. The SoC chip verification system comprises a top layer FPGA (Field Programmable Gate Array) module and one or more bottom layer FPGA modules, wherein the top-layer FPGA module is used for realizing a bus of the SoC chip and all logical operation functions except the bottom-layer module; each bottom FPGA module is used for realizing an independent logical operation unit in the SoC chip; and the top-layer FPGA module and each bottom-layer FPGA module respectively carry out data transmission through a high-speed serial interface. In this way, prototype verification of a large-scale SoC chip can be carried out by using the FPGA with limited resources, and limitation on prototype verification due to insufficient resources of the FPGA is broken through.

Description

technical field [0001] The present disclosure belongs to the field of chip design, and in particular relates to an SoC chip based on an FPGA cluster. Background technique [0002] System on Chip (SoC, System on Chip) refers to integrating a complete system on a single chip. Due to the integration of components including processors, accelerators, buses, storage resources, and peripheral interfaces, chip functions and performance have been greatly improved. The emergence of SoC makes the complexity of application specific integrated chip (ASIC, Application Specific Integrated Circuit, application specific integrated circuit) increase exponentially, which makes verification work a key bottleneck in chip design. FPGA (Field-Programmable Gate Array, field programmable The importance of gate array) verification is further highlighted. [0003] However, due to the limitation of prototyping verification caused by insufficient resources of FPGA itself, the existing scheme of using ...

Claims

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Application Information

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IPC IPC(8): G06F30/331G06F15/78G06F13/40
CPCG06F30/331G06F15/7807G06F13/4068Y02D10/00
Inventor 刘志哲董胜波赵晨旭易翀
Owner BEIJING INST OF REMOTE SENSING EQUIP
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