Convolutional neural network hardware acceleration method of parallel computing unit

Abstract

The invention relates to a convolutional neural network hardware acceleration method of a parallel computing unit. The method comprises the following steps of S1, performing weight parameter quantization on a trained convolutional neural network model according to a static quantization method and a layered quantization method; s2, performing operation on the quantized convolutional neural network model through a parallel computing unit preset on a hardware circuit; and S3, according to different calculation parallelism degrees of the convolutional neural network models with different input sizes in a reasoning stage, self-adaption to the convolutional neural network models with different convolution kernel sizes is carried out through an on-chip reconfigurable technology. According to the method, the purpose of convolutional neural network hardware acceleration can be achieved, and high reasoning speed is achieved under the condition of low power consumption.

Description

technical field [0001] The invention relates to the technical field of computer hardware, in particular to a convolutional neural network hardware acceleration method based on static quantization, hierarchical quantization and parallel computing units. Background technique [0002] In recent years, with the development of artificial intelligence technology, algorithms represented by convolutional neural networks have achieved excellent results in the application of computer vision. However, the complex calculation volume and large-scale computing parameters of convolutional neural networks are not suitable for embedded devices with limited hardware resources. How to deploy convolutional neural networks on edge embedded devices and make them into intelligent terminals has become a topic in academia and industry. research hotspot. [0003] At present, there are many products on the market that implement hardware acceleration for convolutional neural networks based on parallel...

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Problems solved by technology

However, the complex calculations and large-scale calculation parameters of convolutional neural networks are not suitable for embedded devices with limited hardware resources. How to deploy convolutional neural networks on edge embedded devices and make them intelligent terminals has become a topic in academia and industry. research hotspots

[0003] At present, there are already many products on the market that implement hardware acceleration for convolutional neural networks based on parallel computing modules. The vector calculation module and other methods, but these schemes do not consider the generality of the quantization method of the model parameters for the network structure

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