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Semiconductor device and process for producing the same

A technology for semiconductors and devices, which is applied in the field of inverted semiconductor devices, and can solve problems such as inability to bond semiconductor devices S, insufficient soldering strength, inconsistent connection resistance values ​​of bumps 6, etc.

Inactive Publication Date: 2004-06-09
PANASONIC CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Therefore, when the circuit substrate 17 has warpage larger than 10 μm, or when the thickness irregularity among the electrodes 18 of the circuit substrate 17 is larger than 10 μm, there occurs such a situation that the semiconductor device S cannot be properly bonded to the circuit substrate 17 question
[0014] Another example Figure 24 As shown, because the distance between the top of each bump 6 of the semiconductor device S and the corresponding electrode 18 of the circuit substrate 17 is inconsistent, there is also such a soldering strength between the semiconductor device S and the circuit substrate 17 may not be sufficient, and there is also such a problem that the connection resistance value of each bump 6 may not be consistent

Method used

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  • Semiconductor device and process for producing the same
  • Semiconductor device and process for producing the same
  • Semiconductor device and process for producing the same

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0052] Embodiment 1 of the present invention will be described below with reference to the drawings.

[0053] like figure 1 and 2 As shown, in Embodiment 1 of the present invention, a plurality of electrode terminals 5 are exposed on the surface insulating layer 7 of the semiconductor chip 4 (IC chip). Thus, each electrode terminal 5 has a square shape in plan view.

[0054] Thus, the protruding top 8 a of the stud bump provided on each electrode terminal 5 is directed to a corner of the electrode terminal 5 . Then, when the radial line corresponds to the diagonal line "a" or "b" passing through the two pairs of corners, the length of the radial line from the center to the periphery of the electrode terminal 5 is the longest. Therefore, even if the position or shape of each bump 8 is slightly irregular, it is almost impossible for the bump 8 to slip out of the electrode terminal 5 . Therefore, there is no need to worry about the bump 8 on the electrode terminal 5 . Conta...

Embodiment 2

[0060] Embodiment 2 of the present invention will be described below with reference to the drawings.

[0061] like Figure 6 As shown, the semiconductor chip 4 that is arranged with a plurality of bumps 6 on the front surface of the chip is fixed by the suction force (drawing force) to the back side of the chip with the semiconductor fixing table 21 that has a suction nozzle (nozzle). Each bump 6 is made of gold (AU) or the like, and has a round head. And, the whole platform 22 that is arranged under the semiconductor fixing platform 21 has an electrode 23 on each position of the platform to be contacted with each bump 6 respectively, and each electrode 23 is connected with a tester 24 again.

[0062] When the semiconductor fixed table moves down, such as Figure 7 As shown, each bump 6 is pressed to a corresponding electrode 23 in order to implement a leveling process on the bump 6 . At the same time, the internal circuit of the semiconductor chip 4 is electrically connect...

Embodiment 3

[0069] Embodiment 3 of the present invention will be described below with reference to the drawings.

[0070] like Figure 12 , A bump 6 (protruding electrode) is formed on each electrode end of the semiconductor chip 4 of the semiconductor device SM with gold wire, solder wire, etc., by means of ball bonding technology. Therefore, it is difficult to make the height of each of the bumps 6 uniform in the step of forming the bumps 6, so that each of the bumps 6 has a different height inevitably.

[0071] like Figure 13As shown, each of the plurality of electrodes 18 provided on the circuit substrate 17 bonded to the semiconductor device SM is likely to have a non-uniform thickness. As described above, even if each electrode 18 of the circuit substrate 17 has an uneven thickness, or even if the circuit substrate 17 has warpage or undulations so that each electrode 18 of the circuit substrate 17 has an uneven height, when the semiconductor device SM The top of each bump 6 of t...

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PUM

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Abstract

An electrode terminal (5) provided on a surface of a semiconductor chip (4) has a square shape in plane view. Further, the projecting apex portion (8a) of a bump (8) provided on the electrode terminal (5) orients to a corner portion (5a) of the electrode terminal (5). Hereupon, a gold ball (2a) formed by melting the lower end portion of a gold wire (2) supplied through a capillary (1) is joined to the electrode terminal (5), and then the capillary (1) is moved in the direction of a diagonal line of the square electrode (5). Thus, the main portion of the gold wire (2) is separated from the gold ball (2a) so that the bump (8) is formed.

Description

technical field [0001] The invention relates to an inverted semiconductor device (integrated circuit device) in which a plurality of bumps are arranged on the surface of a semiconductor device chip, and in particular to an electrode terminal that makes each bump and a pad of the device function as an exposed electrode Correspondingly, an upside-down semiconductor device that is bonded to a circuit substrate through its bumps by using surface-down soldering technology, and a method for manufacturing the device are provided. The present invention also relates to a method of bonding a semiconductor device to a circuit substrate by using manufacturing processes of various electronic devices to electrically connect each electrode terminal of the semiconductor device to a corresponding electrode of the circuit substrate. Background technique [0002] In the manufacturing process of inverted semiconductor devices (integrated circuit devices), generally according to Figure 19 The i...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/60H01L23/485
CPCH01L2224/1403H01L2224/0603H01L2224/1134H01L2924/01079H01L24/16H01L2224/16H01L2924/14H01L2924/01005H01L2924/01033H01L2924/01006H01L2224/13144H01L2924/00013H01L2924/01078H01L2224/0401H01L2224/131H01L24/11H01L2924/014H01L2224/11822H01L2924/01039H01L24/12H01L2224/45144H01L2224/05573H01L2224/05568H01L2924/00014H01L2224/81191H01L2224/1184H01L2224/13099H01L2924/00H01L2224/05599H01L2924/00012H01L21/321
Inventor 八木能彦东和司熊谷浩一塚原法人米泽隆弘
Owner PANASONIC CORP