Semiconductor memory

Abstract

By eliminating a current of bit lines which is generated regularly by an off-leak current in memory cells, the number of memory cells per bit line is made to increase, large storage capacity of the memory cell array is achieved, and a semiconductor memory device capable of reducing a chip area is provided. In order to achieve it, provided is a source line potential control circuit for setting a source potential of transistors included in the memory cells being selected by row selection signals at a ground potential, and for setting a source potential of the transistors included in the memory cells being set as a non-selection state by the row selection signals at a power potential. A potential difference between sources and drains of the transistors included in the memory cells of the non-selection state is thereby reduced, and the leakage current is eliminated.

Description

technical field [0001] The present invention relates to semiconductor memory, and in particular to circuit technology for realizing large-scale memory cell array. Background technique [0002] Figure 17 It is a circuit diagram showing an example of the structure of a contact-type mask ROM as a conventional semiconductor memory. The so-called contact mask ROM is to make whether the drain of the memory cell transistor is connected to the bit line respectively corresponds to "0" and "1" of the stored data. [0003] exist Figure 17 Among them, the conventional semiconductor memory is composed of memory cell arrays 1, 2, column decoders 3, 4, precharge transistors 5, 6, readout circuits 7, 8, and output selection circuit 9. [0004] The memory cell array 1 is configured by arranging memory cells M1(i, j) (i=1-m, j=1-n) composed of N-type MOS transistors in a matrix, that is, in rows and columns. [0005] For every n memory cells M1(i,j) that have the same value i and are arra...

AI Technical Summary

Problems solved by technology

Among them, the off-leakage current of transistors increases rapidly due to miniaturization, and the above-mentioned problem has become a major problem in the realization of semiconductor memories.

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