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Method for testing high speed data transmission rate

A technology of automatic testing and automatic testing system, applied in the direction of semiconductor/solid-state device testing/measurement, etc., can solve the problem that the circuit chip cannot pass the test and so on

Inactive Publication Date: 2006-12-27
ETRON TECH INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, the timing of this static strobe causes correctly functioning circuits to fail the test, especially those circuits that are most remote from the active window.

Method used

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  • Method for testing high speed data transmission rate
  • Method for testing high speed data transmission rate
  • Method for testing high speed data transmission rate

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Embodiment Construction

[0029]The preferred embodiment of the present invention discloses a method for testing integrated circuit components with high data transmission rate. In particular, a method of optimizing data strobes for use in parallel, multilayer circuits, and automated test systems is disclosed. The method is suitable for simultaneous, multi-layer wafer or multi-layer package testing. It will be apparent to those skilled in the art that the application and extension of the present invention do not depart from the scope of the present invention.

[0030] refer to Figure 5 , which represents a method 100 for optimizing data strobe pulses for a multi-layer circuit, automatic test system in the first preferred embodiment of the present invention. Several important features of the invention are shown in the diagrams and will be further described below. The invention is particularly effective in a wafer test or in the final test of packaged components. The method 100 includes: first, probi...

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Abstract

The invention is a method of optimizing data stroke pulse used in multilayer circuit and auto-testing system, containing: firstly, in parallel detecting a circuit group including many circuits; secondly, initializing one data stroke pulse of an auto-testing system to a stroke pulse set point circulating corresponding to a system time pulse; thirdly, in parallel, using the set point to partially test each function of the circuit; fourthly, recording a circuit yield of the circuit group at the set point; fifthly, updating the data stroke pulse to a new stroke pulse set point; sixthly, repeating the testing, recording and updating steps until a specific range of the stroke pulse set point is completed; and at last, setting the data stroke pulse used in the circuit group and related to the highest circuit yield to the stroke pulse set point.

Description

technical field [0001] The present invention relates to a method for testing integrated circuit components, especially for a parallel, multi-layer circuit, automatic test system, and uses an optimized data strobe (data strobe) to test high-speed data transmission rate method. technical background [0002] An important step in the manufacture of integrated circuit components is testing. Due to the increasing complexity and computing speed of integrated circuit components, unique challenges are presented in the testing process. Generally speaking, integrated circuits are tested several times during the manufacturing process. In particular, individual IC chips are tested once before dicing and packaging, and again after packaging to ensure functionality. [0003] A challenging circuit test involves extremely high-speed components. In particular, high-speed data transmission components such as double data rate (DDR, double data rate) dynamic random access memory (DRAM) etc. ...

Claims

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Application Information

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IPC IPC(8): H01L21/66
Inventor 丁达刚王释兴陈宏傑
Owner ETRON TECH INC