Unlock instant, AI-driven research and patent intelligence for your innovation.

Semiconductor packaging method for attaching semiconductor duct core to substrate by using adhesive wafers

A technology of semiconductor tubes and adhesives, applied in the field of manufacturing chip size and stacked die packaging, to save stamping devices and lamination devices, save time and reduce costs

Inactive Publication Date: 2007-03-07
NAT STARCH & CHEM INVESTMENT HLDG CORP
View PDF10 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

This method requires specialized film lamination equipment as well as dedicated film die bonding equipment

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Examples

Experimental program
Comparison scheme
Effect test

example 1

[0027] Example 1: A thin film thermoset epoxy adhesive (RP571-10 from Ablestik Laboratories), supplied as a 12 inch x 12 inch x 2 mil thick sheet, was laminated to a BT laminate (Mitsubishi Consortium Gas Chemical Co., 8 inches by 8 inches by 8 mil thickness) on both sides:

[0028] Speed: 30.5 cm / min

[0029] Temperature: 135

[0030] Pressure: 40psi

[0031] The laminating adhesive was then mounted on cutting tape (Nitto SPV224) and cut into 4mm x 6mm decals using a Disco DAD 320 cutter set to the following parameters:

[0032] Blade: NBC-ZH27HEEE

[0033] Spindle speed: 30000 rpm

[0034] Feed rate: 2.54 cm / s

[0035]Cutting Mode: Downward Cutting

[0036] The ability of the diced adhesive to be handled was tested with an ESEC Die Bonder 2007 LOC die bonder with pick-and-place capability, with two tests set to the following parameters:

[0037] Experiment #1 #2

[0038] Pick up z-height (mils) 177 177

[0039] Pickup time (ms) 50 50

[0040] Foil Contact Time (ms...

example 2

[0046] Example 2: Single ply polyethylene (US Plastics 30.48 cm x 30.48 cm x 3 mil thickness) mounted on Nitto SPV-224 cutting belt and using NBC-ZH27HEEE blade for Disco DAD 320 cutter, 30000 rpm spindle speed and a feed rate of 2.54 cm / sec to cut it into 4 mm x 6 mm dimensions. The cutting conditions are:

[0047] Cutting Mode A

[0048] cut shape square

[0049] Spindle speed 32000 rpm

[0050] Work piece thickness 7 mils

[0051] Tape thickness 3 mils

[0052] Blade height 2 mils

[0053] Feed speed 0.5 cm / s

[0054] Y index CH10.4 cm

[0055] CH20.6 cm

[0056] The ability of the diced adhesive to be handled was tested with a pick-and-place ESEC Die Bonder 2007 LOC die bonder set to the following parameters:

[0057] Pick up z-height (mm) 6.00 to 5.52

[0058] Pickup Time (ms) 600 to 6000

[0059] Foil Contact Time (ms) 200

[0060] Needle top height (mm) 0 to 1.80

[0061] Injector height offset (mm) 0

[0062] Needle speed (mm / s) 30 to 110 ...

example 3

[0070] Example 3: The same test as Example 2 was performed except that the backing material was 5 mil silicone. Failed to pick up ten times out of ten tests.

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

Fabrication of a CSP or a stacked chip CSP can be accomplished with an unsupported film adhesive or an adhesive supported on a rigid carrier, using standard die attach equipment constructed for use with a paste adhesive.

Description

technical field [0001] The present invention relates to adhesives and bonding methods used in the manufacture of semiconductor packages. The invention is particularly useful for manufacturing chip scale and stacked die packages. Background technique [0002] Chip scale packaging (CSP) offers the advantages of light weight, small footprint, high density, and improved electrical performance in a semiconductor package. CSPs comprising one or more integrated semiconductor chips stacked in sequence further improve electrical performance and reduce space and weight. [0003] The semiconductor is mechanically and electrically connected to the substrate, which in turn is connected to other devices or an external power source. The substrate can be rigid like a metal lead frame, ceramic or laminate, or it can be flexible like polyimide tape. [0004] A well-known method of connecting a semiconductor to its substrate is wire bonding, in which the semiconductor chip is first adhered ...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/58H01L21/68H01L25/18H01L21/44H01L21/48H01L21/52H01L23/00H01L23/02H01L23/31H01L25/065H01L25/07
CPCH01L2924/0665H01L2224/2919H01L2924/01082H01L2224/83101H01L24/83H01L21/6835H01L24/29H01L2924/01005H01L2924/01006H01L23/3114H01L2924/01078H01L2924/01027H01L2224/8319H01L2924/01087H01L2224/8385H01L2924/07802H01L2924/01039H01L2924/00H01L2924/3512H01L23/12
Inventor 何锡平C·J·多米尼克
Owner NAT STARCH & CHEM INVESTMENT HLDG CORP