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Thin film transistor substrate and its producing method

A thin-film transistor and substrate technology, which is applied in the direction of transistor, semiconductor/solid-state device manufacturing, electric solid-state device, etc., can solve problems such as uneven characteristics of thin-film transistors, changes in etching rate, and decline in yield

Inactive Publication Date: 2002-10-16
JAPAN DISPLAY INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, for example, in Japanese Patent Publication No. 10-247733 published in 10 years of Heisei, it has been disclosed that in the wet etching of Mo alloy, a passivation film is formed on the surface of the film related to conditions such as stirring the solution during etching, which makes the etching case of rate change
Therefore, in the manufacturing process of side etching the Mo-W alloy film by wet etching, and forming LDD in a self-aligned manner on the part where the gate is retreated from the resist, there is a side etching length reflecting the change of the etching rate. The problem that the length of the LDD becomes non-uniform and the characteristics of the thin-film transistor become non-uniform and the yield decreases

Method used

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  • Thin film transistor substrate and its producing method
  • Thin film transistor substrate and its producing method
  • Thin film transistor substrate and its producing method

Examples

Experimental program
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Effect test

Embodiment 1

[0028] figure 1 and figure 2 A first example of a method for manufacturing a thin film transistor substrate according to an embodiment of the present invention is shown. Through the base film 2 made of SiN for blocking impurities from the glass substrate and the 2 To form the base film 3, a polysilicon film 4 is formed on a glass substrate 1 as a transparent insulating substrate. The polysilicon film is formed by plasma CVD, annealed at below 400°C for dehydrogenation, and then crystallized by pulsed excimer laser annealing.

[0029] After the polysilicon film is processed into an island shape by photolithography, the SiO used as the gate insulating film 5 is deposited by the plasma CVD method using TEOS (tetraethoxysilane). 2 membrane. Further, the conductive film 6 composed of Mo-W alloy was deposited to a thickness of 150 nm by a sputtering method using a Mo-W alloy as a target. A Mo-W alloy with a W concentration of 20% by weight was used. Apply a positive-type resi...

Embodiment 2

[0037] Figure 5 , Figure 6 A cross-section along line A-A' of one example of pixels of a liquid crystal display device using a thin film transistor substrate according to the second embodiment of the present invention is shown. The gate 12 of the thin film transistor, the gate line 30 and the common voltage signal line 31 are formed of a Mo-W alloy with a W concentration of 5% by weight (about 3% by atom). The gate 12, the gate line 30 and the common voltage signal line 31 of the thin film transistor are etched with an etching solution containing phosphoric acid concentration of 70% by weight, and the end of the gate 12 is self-aligned to form a LDD 11 of 2 μm.

[0038] On the gate, formed by SiO formed by the plasma CVD method using TEOS 2 The formed interlayer insulating film 13 has a contact hole 14 formed in the interlayer insulating film. The thin film transistor is connected to a drain wiring 15 made of a Ti / Al—Si alloy / Ti laminated film through a contact hole. Fu...

Embodiment 3

[0041] Figure 7 Showing a third embodiment of the thin film transistor substrate according to the present invention, Figure 8 expressed in Figure 7 The cross-section on the B-B' line of the thin film transistor substrate. N-type and P-type thin film transistors are formed on a glass substrate 1 as a transparent insulating substrate, and are connected to each other by a drain wiring 15 made of a laminated film of Mo / Al-Si / Mo. The gate electrodes 12 and 45 of the thin film transistor are formed of a Mo-W alloy having a W concentration of 24% by weight (about 14% by atom). In addition, an LDD is formed at the end of the gate 12 of the N-type thin film transistor so as to face the gate in self-alignment. In addition, in Figure 7 , 14 is the contact hole, the Figure 8 Among them, 13 is an interlayer insulating film.

[0042] exist Figure 9 to Figure 13 in, expressed Figure 8 An example of a thin film transistor substrate fabrication method. On the transparent insula...

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Abstract

On the polysilicon thin film transistor substrate with self-aligned LDD, the W concentration is more than 5% and less than 25% by weight, and it is more desirable to use Mo-W alloy with a W concentration of 17% to 22% by weight to make the gate. The thin film transistor substrate produced by the method of the wet etching process with an etching solution having a concentration of 60% to 70% by weight has uniform characteristics and excellent productivity.

Description

technical field [0001] The present invention relates to an active matrix driven liquid crystal display device and a thin film transistor substrate used for self-luminous display elements such as organic light emitting elements, in particular to a thin film transistor substrate using low temperature polysilicon technology and a manufacturing method thereof. Background technique [0002] In a liquid crystal display device, by using a polysilicon film thin film transistor that can be formed at a relatively low temperature below the heat-resistant temperature of glass, a circuit without a pixel switch is formed on a substrate to reduce the number of components and achieve cost reduction. In order to improve reliability in thin film transistors using polysilicon films, especially in N-type thin film transistors, an LDD (Lightly Doped Drain) that is a low-concentration doped region is provided between the source, drain, and gate . As a method of forming LDD without deviation from...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G02F1/1368H01L21/28H01L21/306H01L21/3205H01L21/3213H01L21/336H01L21/77H01L21/84H01L23/52H01L27/12H01L29/423H01L29/43H01L29/49H01L29/786
CPCH01L27/1214H01L29/42384H01L29/4908H01L29/66765H01L29/78621H01L27/127H01L27/1288H01L27/124H01L29/786
Inventor 佐藤健史高桥卓也加藤智也金子寿辉池田一
Owner JAPAN DISPLAY INC