Non-linear signal processor

[0020] The invention is described below in the context of an exemplary embodiment comprising a television signal processing system. However, the present invention can be applied to other types of signal processing systems.

[0021] Signal processing systems such as television signal processing systems typically include means for amplifying voltage signals, for example, or demodulated luminance signals or component color signals. It is often desirable to provide non-linear gain characteristics for this amplifier. Such as figure 1 As shown, it is often the case that a differential amplifier 10 is used, where one input 12 to the amplifier 10 contains the desired time-varying signal and the other input 14 provides the amplifier 10 with a common mode bias. It is also common for a time-varying common mode component to exist on each of these two input signals. in figure 1 In the circuit of, the common mode bias 14 is applied to the base of the transistor 16, and the time-varying input signal 12 is applied to the base of the transistor 18 in the amplifier 10. The gain of the amplifier 10 is determined by the ratio of the resistance 20 and the resistance 22. The amplifier 10 includes current sources 24 and 26 to provide operating current for the amplifier and improve its common mode rejection rate.

[0022] When it is desired to provide non-linear characteristics for the amplifier thus constructed, in general, it is necessary to provide both a direct current (DC) bias and a non-linear gain circuit for the amplification. figure 2 The circuit of derives the threshold signal 28 passing through the buffer 30, and the threshold signal 28 has a predetermined relationship with the common mode bias. The threshold signal 28 contains a DC component related to the common mode offset and may contain some time-varying common mode components. by figure 2 The threshold signal 28 generated by the circuit described in can be used to bias the non-linear network 32 including the transistor 36 and the secondary gain adjustment resistor 34. The non-linear network 32 is configured to buffer the time-varying common mode signal applied to the input of the amplifier 10 and appear between the emitter of the transistor 18 and the base of the transistor 36. The common mode bias signal 14 applied to the transistor 16 is buffered by the buffer 30 and also appears between the emitter of the transistor 18 and the base of the transistor 36. Since the conduction of the transistor 36 is determined by the forward bias of its base-emitter junction, the conduction threshold of the transistor 36 can be determined by the level of the input terminal 12 corresponding to the common mode bias 14. When the level of the time-varying signal 12 is lower than the threshold signal 28, the transistor 36 is not turned on, and the gain of the amplifier 10 is determined by the ratio of the resistor 20 to the resistor 22. When the level of the time-varying signal 12 is higher than the threshold signal 28, when the transistor 36 is turned on, the gain of the amplifier 10 is determined by the ratio of the parallel connection of the resistor 20 and the resistors 22 and 34.

[0023] in image 3 In the illustrated embodiment, the buffer 30 is implemented by an emitter follower stage composed of a transistor 38 that drives a voltage divider network 40 including a resistive voltage divider composed of resistors 42 and 44 and a bypass capacitor 46 . in image 3 In the embodiment, the threshold signal is derived at the voltage divider point formed by the junction of the resistors 42 and 44. This circuit structure allows the threshold to be located at any level within the dynamic range of the input signal, which is lower than the value of the common mode bias 14. The presence of the bypass capacitor 46 makes the time-varying common mode signal appear at the input 28 of the nonlinear network 32 without attenuation. In this way, you can get Figure 4 For the transfer function of the amplifier shown, the input signal has a relatively high gain that is higher than the preset threshold. note image 3 A different transfer function is explained for each of the red, green and blue channel amplifiers. As we all know, for each channel, the point at which the amplifier gain changes to provide nonlinear processing may be at a different preset level. Because the time-varying common mode signal is directly applied between the base of the transistor 36 and the emitter of the transistor 18, it does not change the turn-on threshold of the transistor 36. The first-order temperature compensation of the non-linear inflection point reference is provided by the structure of the base-emitter junction of the transistors 36 and 38. If the non-linear inflection point is very close to the level of the input common mode bias 14, that is, the resistance 42 << resistance 44, the temperature compensation will be as good as the thermal matching between the transistors 36 and 38. When the value of resistor 42 is increased relative to resistor 44, temperature compensation will become unsatisfactory, but since the change in the base-emitter junction of transistor 38 is equivalent to the change in transistor 36 base-emitter junction, temperature compensation will still be effective. Good results.

[0024] Figure 5 illustrates a image 3 The similar signal processing system embodiment described, but it provides two non-linear inflection points, both of which are the same as or lower than the input common mode bias voltage 14. A voltage divider network 51 is used in the circuit shown in FIG. 5, and the network 51 has an additional threshold signal 52 that is led out at the voltage divider point formed by resistors 44 and 48. In this embodiment, a bypass capacitor 50 is added to ensure that the unattenuated time-varying common mode signal appears at the input 52 of the nonlinear network 54 composed of the transistor 58 and the second secondary gain adjustment resistor 56. The three gain regions associated with Figure 5 occur when: (1) when transistor 36 and transistor 58 are both turned on and the gain of amplifier 10 is determined by the ratio of resistors 20 and 22, (2) when transistor 58 is turned on and the amplifier The gain of 10 is determined by the ratio of resistor 20 and the parallel connection of resistor 22 and resistor 56, and (3) when both transistors 36 and 58 are turned on and the gain of amplifier 10 is determined by the ratio of resistor 20 and resistors 22, 34 and 56 in parallel When deciding.

[0025] Figure 6 The example in provides the image 3 The circuit shown in has similar performance, but it has a non-linear inflection point higher than the input common mode bias voltage. in Figure 6 In the circuit, the voltage divider network 40 is referenced to the positive power supply voltage and an emitter load resistor 60 is added to provide a bias current for the transistor 38 and the voltage divider network 40. The gain of the two gain zones is the same as image 3 The circuits described in have the same characteristics.

[0026] The embodiment of FIG. 7 will provide two successively increasing gain regions for increasing input signal levels. The gain regions have the same characteristics as the circuit illustrated in FIG. 5. The knee points in the circuit of Figure 7 are respectively higher and lower than the input common mode bias level. The low knee point is determined by the threshold signal 28 and the high knee point is determined by the threshold 52. The threshold signal 52 is determined by an additional voltage divider network including resistors 64 and 68. The partial pressure point of 62 is determined. Here, a bypass capacitor 70 is also added to ensure that the unattenuated time-varying common mode change appears at the input 52 of the nonlinear network 54.

[0027] in Figure 8 The signal processing system embodiment described in will provide a system with non-linear characteristics that has a single inflection point higher than the level of the input common mode voltage. In this case, a non-linear network 72 including an NPN transistor 76 is used, and the buffer 30 uses a PNP transistor 70 to provide the non-linear network 72 with a threshold signal 28. The operation is similar to the previous example except that the turn-on bias of transistor 76 is set to a lower level of the input time-varying signal voltage, thereby providing amplifier 10 with a gain determined by the ratio of resistor 20 and resistors 22 and 74 in parallel. When the input signal increases above the threshold 28 set by the voltage divider network 40, the transistor 76 is turned off and the gain of the amplifier 10 is determined by the ratio of the resistors 20 and 22. This determines the non-linear characteristics of the input signal gain reduced but higher than a threshold, which is higher than or equal to the input common mode bias level.

[0028] In a similar manner to the above-mentioned embodiment, the embodiment illustrated in FIG. 9 provides two successively decreasing gain regions, both of which occur at a level higher than the input common mode bias voltage. For the lowest value of the time-varying voltage input, both transistors 76 and 82 are turned on and the gain of amplifier 10 is determined by the ratio of resistor 20 and resistors 22, 74, and 80 in parallel. When the time-varying signal 12 is higher than the threshold signal 28, the transistor 76 becomes non-conductive and the gain of the amplifier 10 is determined by the ratio of the resistor 20 and the parallel connection of the resistors 22 and 80. However, when the time-varying signal 12 is at a higher level determined by the threshold 52, the transistor 82 becomes non-conductive and the gain of the amplifier 10 is determined by the ratio of the resistors 20 and 22.

[0029] The embodiment illustrated in FIG. 10 provides two successively decreasing gain regions, one starts to be lower than and one starts to be higher than the input common mode bias level, which are determined by the threshold signals 28 and 52 respectively; in addition, the implementation of FIG. 11 For example, provide an inflection point determined by the threshold signal 28, which is lower than the input common mode bias voltage and provides a conversion from a relatively low gain region to a relatively high gain region, and then provides a second threshold signal 52 determined by The threshold signal 52 is higher than the input common mode bias voltage and provides a transition from a relatively high gain region to a relatively low gain region.

[0030] The embodiment illustrated in FIG. 12 provides an inflection point determined by the threshold signal 52, which is lower than the input common mode bias voltage and provides a gain from the first gain region to a relatively low gain by making the transistor 76 non-conductive. The second inflection point determined by the threshold signal 28 is then provided. The threshold signal 28 is higher than the input common mode bias voltage and provides a transition to a relatively high gain region, which is determined by the conduction of the transistor 36 Decided. The gains in the first and third regions can be independently set by the values ​​of resistors 74 and 34, respectively. As explained in all other example embodiments, by using a PNP/NPN pair for the buffer and its corresponding non-linear transistor, the best temperature tracking can be maintained for each non-linear inflection point.

[0031] As described herein, the signal processing system embodying the principles of the present invention provides partial differential signaling signal processing for inter-stage communication, followed by differential amplification processing of the signal, and this processing includes methods for generating the non-linear characteristics installation. By using a common bias for signal amplification and non-linear threshold determination, many noise sources are eliminated. The choice of semiconductor type and circuit structure helps to greatly reduce or eliminate temperature-dependent changes in nonlinear thresholds. And, the non-linear inflection point reference tracking has the common mode component of the video signal offset on it. These systems also provide first-order temperature compensation for the following items: one or more of the derived knee point reference, the elimination of these knee point reference changes due to the time-varying common mode amplifier input signal, and the signal dynamic range with different voltage gains area.

[0032] Although a clear description of a circuit containing one or two non-linear inflection points has been provided, it should be understood that the concept can be extended to provide any number of increased and decreased gain regions with inflection points, which can be Located anywhere in the dynamic range of the input signal. Moreover, although the description is made in the context of a television signal processing system, those skilled in the art still need to understand that the principle of the present invention is applicable to other signal processing systems including non-linear processing.