Image displaying circuit and mobile electronic apparatus

Abstract

An image display circuitry comprises frame buffers 32 - 34 for storing image data DTAW, DTRW and logical combining data DTCW respectively, and a combining circuit 46. Data buses and address buses of the frame buffers 32 and 34 are time-sharingly controllable from an MPU independently of those of the frame buffer 33. Each frame of the image data DTRW is synchronized with a vertical synchronizing signal, and stored to the frame buffer 33. Each frame of the image data DTAW and the logical combining data DTCW is separately and independently stored to the frame buffers 32 and 34 by the MPU within a storage period of a corresponding frame of the image data DTRW. The combining circuit 46 combines image data DTAR and DTBR pixel by pixel on the basis of logical combining data DTCR within a specified period during a vertical retrace period.

Description

technical field [0001] The invention relates to an image display circuit and a mobile electronic device. Specifically, it relates to an image display circuit, which is used to display characters, images, etc. to be displayed on the display in combination, and it constitutes a mobile electronic device, such as a notebook / handheld / pocket computer, a personal digital assistant (PDA), a mobile phone , Personal Handyphone System (PHS), etc.; also relates to a mobile electronic device, which uses the above-mentioned image display circuit. Background technique [0002] FIG. 1 is a structural diagram showing a structural example of a conventional graphic display device disclosed in Japanese Unexamined Patent Publication No. 63-178294. [0003] The graphics display device of this example includes a microprocessor unit (MPU) 1, a memory 2, an interface control unit 3, a bus 4, frame buffers 5-7, registers 8-10, a storage control circuit 11, point Shifters 12-14, palettes 15 and 16, ...

AI Technical Summary

Problems solved by technology

Therefore, if the host device occupies the interface control unit 3 and the bus 4 and supplies image data, or if the MPU 1 occupies the bus 4 and performs various processing, the camera image data cannot be supplied to the frame buffer 5 or 6

Therefore, the disadvantage of the conventional graphic display device is that the camera image data and other image data cannot be combined and displayed on the CRT display unit 20 in real time.

[0013] Moreover, the above-mentioned Japanese Unexamined Patent Publication No. 63-178294 does not disclose in any way the specific timing of image combination

Therefore, the techniques disclosed in the above publications do not in any way specifically suggest how to enable image combination

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