Method and device for testing printed circuit boards with a parallel tester

A printed circuit board, test printing technology, applied in the directions of printed circuit, printed circuit manufacturing, printed circuit testing, etc., can solve problems such as wrong measurement, slow connector tester, and test probes that cannot be close to each other.

Inactive Publication Date: 2003-10-15
ATG TEST SYST
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, compared to types of equipment that operate with interposers, connector testers are substantially slower because the board test points are scanned sequentially
[0009] Parallel testers, on the other hand, have the disadvantage of limited resolution because the

Method used

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  • Method and device for testing printed circuit boards with a parallel tester
  • Method and device for testing printed circuit boards with a parallel tester
  • Method and device for testing printed circuit boards with a parallel tester

Examples

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Embodiment Construction

[0050] figure 1 is shown schematically an apparatus according to the invention for testing printed circuit boards. The device 1 has a parallel tester 2 and a joint tester 3 . The parallel tester 2 and the joint tester 3 are connected by a conveyor 4 , which is formed by two conveyor belts 5 in this embodiment. With the conveyor 4, the printed circuit boards to be tested can be transferred in the transfer direction 6 from a substantially known but not shown separation station to the parallel tester 2 and from the parallel tester 2 to the joint tester 3, and From the splice tester 3 it is conveyed to a generally known but not shown collection station.

[0051] The parallel tester 2 has a main body 7 with a mounting area 8 on the top for fixing a printed circuit board to be tested. When both sides of the circuit board are to be tested, the mounting area 8 is provided with an adapter having contact elements for contacting the circuit board test points. Facing the mounting area...

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PUM

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Abstract

The invention relates to a method and device for testing printed circuit boards with a parallel tester. The printed circuit boards comprise strip conductors whose end points are embodied as printed circuit board testing points which can be contacted during testing. The method comprises the following steps; testing a printed circuit board with a parallel tester, whereby the printed circuit board testing points of the printed circuit board are brought into contact with the contact elements of the parallel tester; determining the printed circuit board testing points which are either judged to be unable to be put correctly into contact with the parallel tester or deemed to be basically unable to be put into contact with the parallel tester; and re-measuring the printed circuit board test points judged to be unable to be put correctly into contact or the non contactable printed circuit board test points and also the strip conductors connected to said points by means of a device which is independent from the contact elements in the parallel tester.

Description

field of invention [0001] The present invention relates to a method and apparatus for testing printed circuit boards, and more particularly to a method and apparatus for testing unpopulated circuit boards. Background technique [0002] Printed circuit boards have multiple meshes whose density increases with the continued miniaturization of electronic components. This correspondingly increases the density of circuit board contact points described below as circuit board test points. [0003] Known devices for electrical testing of printed circuit boards can be basically divided into two categories. The first category is represented by parallel testers, which have an adapter for simultaneously contacting all circuit board test points to be scanned. The second category includes sequential testers. This specifically includes finger testers, devices that utilize two or more contact heads to sequentially scan individual circuit board test points. [0004] Parallel testers and a...

Claims

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Application Information

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IPC IPC(8): G01R31/02G01R31/28G01R31/309H05K3/00H05K13/00
CPCG01R31/2805G01R31/309G01R31/2806H05K13/0069G01R1/073
Inventor 乌韦·罗特霍格
Owner ATG TEST SYST
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