Digital-to-analogue converting apparatus and method

Abstract

A device used to convert digital signal into analog signal comprises an operation amplifier, a first capacitor set, a second capacity, set, a first switch set and a second switch set. In the first time period, reference voltages corresponded by multiple bit in digital signal are transmitted respectively to the first capacity set; in the second time period, the second capacity set is connected to the first capacity set as the first switch set is closed and in the third time period, the second capacity set is connected between input end and output end of the operation amplifier as the second switch set is closed.

Description

(1) Technical field [0001] The present invention relates to a digital-to-analog conversion device and method, in particular to a digital-to-analog conversion device and method capable of performing more than one-order digital-to-analog conversion to achieve the effect of a higher-order low-pass filter. (2) Background technology [0002] Such as figure 1 As shown, the digital-to-analog conversion device 1 includes an operational amplifier 11, n capacitors C1, C2, ..., Cn, several first switches S1, and several second switches S2. The operational amplifier 11 has a short-circuit positive Input terminal 111, a negative input terminal 112, an output terminal 113, and a feedback capacitor CFB connected between the negative input terminal 112 and the output terminal, each of the left ends of the capacitors C1, C2, ..., Cn is connected to a first switch S2, and the right ends of the capacitors C1, C2, ..., Cn are also connected to the first switch S1, and the right ends of the cap...

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Problems solved by technology

Utilize the two high logic levels of the first time period and the second time period that are completely opposite to the two time periods to control the digital-to-analog conversion action. When the first time period enters the high logic level, all the first switches S1 enter In the closed state, the first switch S1 is connected to a positive reference voltage or a negative reference voltage, and each bit captured by the first switch S1 is a high logic level (i.e. 1), then it is connected to a positive reference voltage, relatively If the bit captured by the ground is a low logic level (i.e. 0), it is connected to a negative reference voltage, so that each of the capacitors C1, C2, ..., Cn is charged with the amount of charge corresponding to the reference voltage of each bit, and then, When the second time period e

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