Phase detection circuit and receiver
A phase detection and receiver technology, applied in electrical components, phase modulated carrier systems, delta modulation, etc., can solve the deterioration of demodulated signal distortion rate characteristics, the deterioration of received bit error rate characteristics, and the analog FM receiver distortion rate characteristics deterioration, etc.
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Embodiment 1
[0126]FIG. 1 is a diagram showing the configuration of Embodiment 1 of the phase detection circuit of the present invention. In FIG. 1, 101 is a quadrant determination unit, 102 is a rotation projection unit, 103 is an integrator, 104 is a 1-bit quantizer, 105 is a delayer, 1 is an adder and 2 is a low-pass filter. In this embodiment, a Δε modulator is composed of a quadrant determination unit 101 , a rotation projection unit 102 , an integrator 103 , a 1-bit quantizer 104 , a delay unit 105 , and an adder 1 .
[0127] Here, the operation of the phase detection circuit of the first embodiment will be described. The respective configurations with the same symbols as the original ones operate in the same manner. The quadrant determination unit 101 determines the quadrant of the received signal from the positive or negative of the received in-phase component and quadrature component received baseband signal, and outputs a rough phase value corresponding to the result. When the ...
Embodiment 2
[0134] In the first embodiment described above, the case where the quadrant determination unit 101 quantizes the phase of the received signal with 2 bits is described, but in the second embodiment, the case where the quantization resolution is N (natural number) is described.
[0135] FIG. 3 is a diagram showing the configuration of Embodiment 2 of the phase detection circuit of the present invention. In FIG. 3 , 401 is a phase quantization unit, and 402 is a transform selection unit. The same configurations as in the first embodiment described above are given the same reference numerals, and their descriptions are omitted. In this embodiment, a Δε modulator is composed of a phase quantization unit 401 , a transform selection unit 402 , an integrator 103 , a 1-bit quantizer 104 , a delay unit 105 , and an adder 1 .
[0136] Here, before describing the operation of the phase detection circuit of the second embodiment, the operation of a general phase detection circuit when the...
Embodiment 3
[0163] 6 and 7 are diagrams showing the configuration of Embodiment 3 of the phase detection circuit of the present invention. In Fig. 6 and Fig. 7, 3 is a sample hold circuit. The same configurations as in Embodiments 1 and 2 above are assigned the same symbols, and descriptions thereof are omitted. The structure of FIG. 6 is to apply the sample-and-hold circuit 3 to the structure of the above-mentioned embodiment 1 (FIG. 1), and the structure of FIG. 7 is to apply the sample-and-hold circuit 3 to the structure of the above-mentioned embodiment 2 (FIG. 3), but it is not limited thereto. , for example, the sample hold circuit 3 can be applied to the configurations of FIG. 30 and FIG. 4 .
[0164]In the sample hold circuit 3, through the Δε modulator in the phase detection circuit (in FIG. 7, which corresponds to the phase quantization unit 401, the transform selection unit 402, the integrator 103, the 1-bit quantizer 104, the delay unit 105, and the adder 1) of Δε modulation...
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