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Structure of inclosure curtain type read-only storage and its manufacturing method

A technology of read-only memory and manufacturing method, which is applied in semiconductor/solid-state device manufacturing, electric solid-state device, semiconductor device and other directions, can solve the problems of difficult improvement, time-consuming mask manufacturing, insufficient buried bit line current, etc. The effect of production cost

Inactive Publication Date: 2004-05-05
MACRONIX INT CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, this method must design a mask with a special pattern
Therefore, in addition to the time-consuming production of the photomask, it also increases the difficulty and cost of manufacturing the photomask.
In addition, it is extremely difficult to improve (debug) the defects of the mask pattern after the mask is manufactured.
[0005] In addition, in the known method, if the code mask used in the code implantation process has the problem of misalignment or critical dimension deviation, the code ions originally planned to be implanted in the channel region will also diffuse to the implanted channel area. bit line
In this way, the ion concentration in the buried bit line will change, and the current of the buried bit line will be insufficient.

Method used

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  • Structure of inclosure curtain type read-only storage and its manufacturing method
  • Structure of inclosure curtain type read-only storage and its manufacturing method
  • Structure of inclosure curtain type read-only storage and its manufacturing method

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Embodiment Construction

[0029] Figure 1A to Figure 1F As shown, it is a cross-sectional schematic view of the manufacturing process of the mask ROM according to a preferred embodiment of the present invention.

[0030] Please refer to Figure 1A First, a stack layer 107 composed of a first dielectric layer 102 , a termination layer 104 and a second dielectric layer 106 is formed on a substrate 100 . Wherein, the method for forming the stacked layer 107 is, for example, depositing a first dielectric material layer (not shown), a termination material layer (not shown) and a second dielectric material layer (not shown) on the substrate 100 sequentially. shown), and then use a photolithographic etching process to pattern the second dielectric material layer, the stop material layer (not shown) and the first dielectric material layer to form. In this embodiment, the material of the first dielectric layer 102 and the second dielectric layer 106 is, for example, silicon oxide, and the material of the term...

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Abstract

The structure includes a substrate, a flush type bit line in the substrate, patterned stack layer, a grid oxide layer and a character line. The said stack layer on surface of part of substrate is composed of a first dielectric layer, a termination layer and a second dielectric layer. The grid oxide layer is on surface of part of substrate. The character line bestriding on the said bit line constitutes couple of coding storage units. It is logic state '0', if the coding storage unit possesses stack layer, and it is logic state '1', if the coding storage unit possesses grid oxide layer.

Description

technical field [0001] The present invention relates to a memory structure and its manufacturing method, and in particular to a mask ROM (Mask ROM) structure and its manufacturing method. Background technique [0002] The structure of a general mask ROM includes several bit lines (Bit Line, BL) and several polysilicon word lines (Word Line, WL) straddling the bit lines. The area below the word line and between two adjacent bit lines is the channel area of ​​the memory cell. For some mask-type ROMs, the programming method is to store data "0" or "1" by using whether ions are implanted in the channel or not. The process of implanting ions in specific channel regions is also called code implantation process. [0003] Generally, the code implantation process of the mask read-only memory is to firstly use a photomask to pattern the photoresist layer formed on the substrate, so as to expose the channel area to be coded. Then, an ion implantation process is performed with the pa...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H10B20/00
Inventor 张庆裕
Owner MACRONIX INT CO LTD
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