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I/O partitioning system and methodology to reduce band-to-band tunneling current during erase

A tunneling current and subsystem technology, applied in the field of electrically erasable programmable read-only memory, can solve the problems of inaccurate erasing, incorrectness, drain pumping, etc., and achieve the requirements of reduced demand, low power and size Effect

Inactive Publication Date: 2004-06-23
CYPRESS SEMICON CORP
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Problems solved by technology

[0005] However, the increased need for band tunneling current can lead to problems associated with drain pumping
For example, increasing the current may increase IR drops in the memory device and thus cause the drain pump output voltage to drop
If the drain pump output voltage drops, errors may occur during flash erase or program operations, resulting in incorrect or inaccurate erasing / programming of memory cells
Currently, conventional flash erase systems can cause problems with increased band-to-band tunneling current

Method used

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  • I/O partitioning system and methodology to reduce band-to-band tunneling current during erase
  • I/O partitioning system and methodology to reduce band-to-band tunneling current during erase
  • I/O partitioning system and methodology to reduce band-to-band tunneling current during erase

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Embodiment Construction

[0018] The following is a detailed description of the present invention in conjunction with the related drawings, wherein the same elements are marked with the same numerals.

[0019] The present invention relates to systems and methods for reducing band-to-band tunneling current during flash memory erase operations. The above object is achieved by dividing the I / O block of the flash memory into N sub-blocks, wherein N is an integer, and providing relevant erase pulses to each sub-block for erasing the sub-block. As will be described in more detail below, the erase sequence system generates one erase pulse for N sub-blocks to erase the divided blocks of the I / O block. The erase sequence system can also switch to a full block erase operation for the entire I / O block after a predetermined number of partition erases (eg, 2, 3). Furthermore, the sector erase provided by the present invention can be applied to most flash technologies, such as multi-bit cell structure and single-bi...

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Abstract

A system (10a) is provided for reducing band-to-band tunneling current during flash memory erase operations. The system (10a) includes an I / O memory sector (20) divided into (N) subsectors, N being an integer, and a drain pump (40) to generate power for associated erase operations within the N subsectors. An erase sequencing subsystem (60) generates N pulses (50) to enable the erase operations within each of the N subsectors in order to reduce band-to-band tunneling current provided by the drain pump (40).

Description

technical field [0001] The present invention relates to Electrically Erasable Programmable Read-Only Memory (EEPROM), and more particularly to reducing band-to-band during erasure of Flash EEPROM by partitioning the memory I / O of the erase cycle. Systems and methods for band-to-band tunneling current. Background technique [0002] Memory devices such as Electrically Erasable Programmable Read Only Memory (EEPROM) are important architectural components in modern computer systems. These systems affect many aspects of society, from the family to business and education. For example, wireless systems such as mobile phones have become a necessity in people's daily life. However, with the advancement of these technologies and other related technologies, system designers and manufacturers have gradually increased requirements for system requirements. One of the most important needs is to increase the memory density and miniaturize the memory package in order to provide more compa...

Claims

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Application Information

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IPC IPC(8): G11C16/02G11C16/06G11C16/16G11C16/34
CPCG11C16/344G11C16/3445G11C16/16G11C16/04
Inventor E·V·小波提斯塔栗原和弘F·潘W·F·李R·森卡瓦里D·汉密尔顿
Owner CYPRESS SEMICON CORP
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