Sensing circuit of single bit line semiconductor memory element

Abstract

The invention provides a sensing circuit, to sense logic data, and a memory unit is connected to a bit line, and the sensing circuit contains a first precharge module connected to the bit line and to precharge; a select module connected between the bit line and a first data line and to transmit signal and isolate capacitor; a second precharge module connected to the first data line and to precharge; a first voltage hold module connected to the first data line and to hold the signal of the first data line at high-voltage level; an isolate module connected between the first data line and a second data line and to transmit signal and isolate capacitor; and a third precharge module connected to the second data line and to precharge.

Description

technical field [0001] The present invention provides a sensing circuit (Sense Out Circuit), especially a sensing circuit used in a semiconductor storage element of a single bit line and including a voltage maintaining module (Keeper). Background technique [0002] In various electronic products currently on the market, memory has always been one of the very important and indispensable components. Memory can be divided into two categories according to the way of storing data: volatile memory and non-volatile memory. Volatile memory refers to the digital data stored in the memory that will disappear after the power supply is cut off. Storage device, the advantage of volatile memory is its fast access speed, and it is often used as a buffer between high-speed processing units and other circuits, but volatile memory cannot continue to retain data when the power supply is cut off , such as DRAM, SDRAM and other products are a kind of volatile memory. Non-volatile memory refers...

AI Technical Summary

Problems solved by technology

Therefore, in the process of reading the logic value "0", whether it is the second pre-charge module 16 or the selected memory cell 22, it must be connected to the bit line BL. 1 And the charging and discharging of the huge capacitance of the data line DL, and this will cause the speed of reading data of the read-only memory to be greatly limited

Simultaneously on the bit line BL 1 And the huge capacitance of the data line DL is charged and discharged, which will also cause a very large amount of dynamic power (Active Power) consumption

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