Frame synchronous circuit and method for eliminating time frequency deviation effect of orthogonal FDM

A technology of multiplexing signals and time-frequency deviation, applied in the directions of orthogonal multiplexing system, multiplexing communication, synchronization device, etc., can solve the problems of carrier frequency deviation and sampling clock deviation, detection failure, etc., to achieve Strong anti-interference ability, simple algorithm and flexible structure

Inactive Publication Date: 2005-01-12
TSINGHUA UNIV
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Problems solved by technology

However, when the receiver does not establish any synchronization, the carrier frequency deviation and sampling clock deviation in th

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  • Frame synchronous circuit and method for eliminating time frequency deviation effect of orthogonal FDM
  • Frame synchronous circuit and method for eliminating time frequency deviation effect of orthogonal FDM
  • Frame synchronous circuit and method for eliminating time frequency deviation effect of orthogonal FDM

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Embodiment Construction

[0041] According to one aspect of the present invention, a kind of OFDM frame synchronous detection circuit based on delay conjugate correlation is provided (referring to appended figure 1 ), the number of parallel branches is M+1, and M is any positive integer. The M+1 parallel frame synchronization detection circuit includes: a local reference conjugate sequence generator, which is used to generate the conjugate values ​​of the local reference sequence samples of different time delays of the training sequence; M+1 delay conjugate correlators, used It is used to calculate the delay conjugate correlation value between the local reference conjugate sequence sample value and the input signal sequence; a selective combiner is used to select the maximum value from the correlation values ​​output by M+1 delay conjugate correlators; a A peak detector is used to perform peak detection on the selected maximum value, and output the peak position as the position of OFDM frame synchroniz...

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Abstract

The circuit includes local reference conjugate sequencer, delayed conjugate correlator, selecting merger unit. Local reference conjugate sequencer stores conjugate values of local reference sequence samples in different time delays. Multiplication is carried out between the said conjugate values and OFDM data sequence received respectively. Delayed conjugate correlator delays the multiplied result. After taking conjugate operated result of previous step, Multiplication is carried out between the multiplied result and the delayed multiplied result. The result of multiplication in twice is accumulated and square summation is carried out. Selective merger is carried out for output values of multiple delayed conjugate correlators. Peak detection is carried out in order to select maximum. The position of the peas value is synchronous position. Before frequency synchronism and symbol synchronization, the circuit can find position of OFDM frame precisely without inference from frequency deviation and sampling clock.

Description

technical field [0001] The invention relates to the technical field of digital communication, in particular to a frame synchronization circuit used in an Orthogonal Frequency Division Multiplexing (OFDM) communication system for eliminating the influence of signal carrier frequency deviation and sampling clock deviation (hereinafter referred to as time-frequency deviation). Background technique [0002] Orthogonal Frequency Division Multiplexing (hereinafter referred to as OFDM) is a high-efficiency broadband multi-carrier transmission technology, which has high frequency band utilization and excellent anti-multipath ability, and is suitable for high-speed data transmission. At present, OFDM technology has been widely used in different communication systems, such as the European digital television broadcasting standard DVB-T, the wireless local area network standard IEEE 802.11a and HiperLAN2, the wireless metropolitan area network standard IEEE 802.16a, etc. [0003] In a c...

Claims

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Application Information

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IPC IPC(8): H04J11/00H04L7/00
Inventor 匡麟玲陆建华倪祖耀
Owner TSINGHUA UNIV
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