Image compression chip based on image block dynamic division vector quantization algorithm

An image compression and vector quantization technology, applied in image communication, television, electrical components, etc., can solve problems such as large computational load and high complexity restricting applications, and achieve the effect of improving the compression ratio

Inactive Publication Date: 2006-12-13
XIAN UNIV OF TECH
View PDF0 Cites 4 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, due to the large amount of calculation and high complexity of the vector quantization coding algorithm, its application in high-speed and real-time coding systems is restricted.

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Image compression chip based on image block dynamic division vector quantization algorithm
  • Image compression chip based on image block dynamic division vector quantization algorithm
  • Image compression chip based on image block dynamic division vector quantization algorithm

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0039] The specific structure of the image compression chip based on the image block dynamic division vector quantization algorithm of the present invention can be found in image 3 , the chip includes an external memory, a control unit, a data buffer, a classification module, a codebook address encoder, a codebook memory, a distortion calculation unit, a prediction controller, a quantization controller, and a value memory; the image to be encoded is stored in an external In the memory, a buffer (Cache) stores data of an 8×8 image block (including the current sub-image block CV and adjacent sub-image blocks DV, RV, and RDV). The data buffer (Cache) is connected to the external memory through the 16-bit data line data_im. Under the control of the signal shift_load_n, shift_en_n, ram_wr_n, ram_oe_n from the control unit (Controller), it outputs the pixel value to the distortion calculation unit (distortion) and classification Module (Sort).

[0040] The connection between the dat...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

PUM

No PUM Login to view more

Abstract

The invention relates to an image compression chip, based on image block dynamic divide vector quantizing algorism. Wherein, said chip uses PDVQ algorism, which comprises an external memory, a control unit, a data buffer, a classify module, a code address coder, a code memory, a distortion calculating unit, a forecast controller, a quantizing controller, and a value memory; the data buffer, via 16-bit data bust is connected to the external memory; the data buffer, via 16-bit data bus, is connected to the distortion calculating unit, the classify module and the control unit; the classify module via code address coder is connected to the code memory; the code memory is connected to the distortion calculating unit which is connected to the forecast controller and the quantizing controller; the control unit is connected to the data buffer, classify module, code memory, forecast controller and quantizing controller; the control unit, via enable signal, controls each function module which will report the working state to the control unit via working complete signal.

Description

technical field [0001] The invention belongs to the technical field of integrated circuit design and the field of image compression and transmission, and specifically relates to the special design of some key circuits in the implementation of VQ (vector quantization) hardware to obtain fast encoding speed, high compression ratio, and image restoration. A high-quality image compression chip based on the image block dynamic partition vector quantization (PDVQ) algorithm. Background technique [0002] Since the 1980s, people have devoted themselves to the research of image coding technology, constantly proposing new coding algorithms, and improving existing algorithms by combining new technologies. In the 1990s, the Still Image Experts Group (Joint Photographic Experts Group) proposed a digital encoding standard for multi-grayscale still images—the JPEG standard. At the same time, the Moving Pictures Experts Group (Moving Pictures Experts Group) c...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

Application Information

Patent Timeline
no application Login to view more
Patent Type & Authority Applications(China)
IPC IPC(8): H04N7/32H04N19/42H04N19/94
Inventor 余宁梅王冬芳张玉伦张如亮刘松马海侠
Owner XIAN UNIV OF TECH
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Try Eureka
PatSnap group products