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Methods and systems for high write performance in multi-bit flash memory devices

A flash and memory technology, applied in the field of high-speed programming, which can solve problems such as speed limitation

Inactive Publication Date: 2007-05-23
SPANSION LLC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

For example, the speed at which flash memory can be programmed is currently somewhat limited, limiting the use of flash memory devices for applications that require high-speed programming

Method used

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  • Methods and systems for high write performance in multi-bit flash memory devices
  • Methods and systems for high write performance in multi-bit flash memory devices
  • Methods and systems for high write performance in multi-bit flash memory devices

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Embodiment Construction

[0035] One or more implementations of the present invention are described below with reference to the drawings, wherein like components in each drawing are denoted by like reference numerals. One or more aspects of the invention are illustrated and described below in the context of an exemplary dual-bit flash memory device in which conductively doped polysilicon word lines are formed above a charge trapping layer whereby Several flash memory cells are created in combination with diffused bit line portions (e.g., source / drain) in the silicon semiconductor body of a silicon semiconductor body, and these cells are organized along columns (e.g., word line) in a virtual ground array. ) and straight lines (eg, bit lines). However, the present invention is not limited to the particular implementation shown and may alternatively be incorporated with any particular type of substrate material (eg, silicon wafer, SOI wafer, epitaxial layer, etc.), any type of dibit Flash memory cell str...

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PUM

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Abstract

Methods and circuits are presented for performing high speed write (programming) operations in a dual-bit flash memory array. The method (200) includes, for example, erasing (204) a first and second bit of each cell in the array to a first state, programming (206) the first bit of each cell in the array to a second state, and subsequently programming the second bit of one or more cells in the array to one of the first and second state according to the user's data, resulting in fast write (programming) of those second bits. In addition, the circuit includes, for example, a core cell array (402) having dual-bit flash memory cells configured into a plurality of array portions. The circuit further includes a control circuit (404) configured to selectively block erase one of the array portions, wherein in a first phase of the block erase (204) both first and second bit locations of each dual-bit flash memory cell in the one array portion have sufficient charge removed therefrom to achieve a first state. The control circuit (404) is further configured to, in a second phase (206) of the block erase, supply charge to the first bit location of each dual-bit flash memory cell of the one array portion to enable subsequently fast-write of user's data to the second bit location.

Description

technical field [0001] The present invention relates generally to the field of memory devices, and more particularly, to methods and systems for high-speed programming in multi-bit flash memory devices. Background technique [0002] Flash memory and other types of electronic storage devices are composed of memory cells that individually store and provide access to data. Memory cells of the first generation type store a single binary piece of information called a bit, which has one of two possible states. These units are usually organized into multi-unit units, such as bytes containing 8 units, and characters which may contain 16 or more such units, usually arranged in multiples of 8. Storing data in these memory device architectures is done by writing to a specific set of memory cells, sometimes referred to as programming the cells, and the data can then be retrieved in a read operation. In addition to programming (sometimes called writing) and reading operations, groups o...

Claims

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Application Information

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IPC IPC(8): G11C11/56
Inventor M·伦道夫D·汉密尔顿R·科尔尼采
Owner SPANSION LLC