Memory device, memory system, and memory control method
a memory device and control method technology, applied in the field of memory devices, memory systems, memory control methods, can solve the problems of increasing the floor area of the decoder circuit, and achieve the effects of restrainting the influence of inter-wiring capacitive coupling, and reducing the floor area
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1. EMBODIMENT
[Configuration]
[0055]FIG. 1 illustrates one example of functional blocks of an information processing system according to one embodiment of the disclosure. The information processing system includes a host computer 100 and a memory system 200. The memory system 200 includes a memory controller 300, one or more memory cell array units 400, and a power supply circuit 500. It is to be noted that FIG. 1 illustrates a state in which a plurality of the memory cell array units 400 are provided. The memory system 200 corresponds to one specific example of a “memory system” in the disclosure. The memory controller 300 corresponds to one specific example of a “memory controller” in the disclosure. The memory cell array unit 400 corresponds to one specific example of a “memory device” in the disclosure.
[Host Computer 100]
[0056]The host computer 100 controls the memory system 200. Specifically, the host computer 100 issues a command that specifies a logic address as a target of acc...
modification examples
2. MODIFICATION EXAMPLES
[0156]In the following, described are modification examples of the memory cell array unit 400 according to the forgoing embodiment, or the memory system 200 according to the forgoing embodiment. It is to be noted that in the following, to constituent parts common to those of the forgoing embodiment, assigned are the same reference characters as the reference characters assigned in the forgoing embodiment. Moreover, description is given mainly of constituent parts different from those of the forgoing embodiment. Description of the constituent parts common to those of the forging embodiment is omitted as appropriate.
modification example a
[0157]FIG. 20 illustrates one modification example of the functional blocks of the memory cell array unit 400 according to the forgoing embodiment. The memory cell array unit 400 according to this modification example is different in configuration from the memory cell array unit 400 according to the forgoing embodiment, in terms that the memory cell array unit 400 includes a Vcom circuit 27 instead of the pre-charge circuit 25. In the following, therefore, description is given mainly of contents related to the Vcom circuit 27, with description related to other contents being omitted as appropriate.
[0158]FIG. 21 illustrates one example of a circuit configuration of the Vcom circuit 27. The Vcom circuit 27 has a function equivalent to the function of the pre-charge circuit 25 in a state in which Low is constantly applied to the terminals Vg1 and Vg2 in the pre-charge circuit 25. The Vcom circuit 27 outputs, in accordance with the control by the memory controller 300, the single kind o...
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