Memory protection unit, memory protection method, and computer-readable record medium in which memory protection program is recorded
a memory protection and memory protection technology, applied in the field of memory management, can solve the problems of affecting the area within the process unit, affecting the performance of the whole system, and unable to obtain access to the memory area in the virtual address space of another process, so as to prevent improper rewriting of the memory
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first embodiment
[0059]FIG. 1 is a block diagram, showing the configuration of a memory protection unit according to a first embodiment of the present invention. Herein, the Linux operating system is used as an example. For the present invention, operating systems except the Linux may also be used, such as UNIX (registered trademark), Windows (registered trademark) and TRON (registered trademark).
[0060] The memory protection unit shown in FIG. 1 is configured by: a CPU (or central processing unit) 100; a memory 101; and a memory management unit (or MMU) 102. The CPU 100, the memory 101 and the memory management unit 102 can mutually transmit and receive data, for example, through a bus.
[0061] In the memory 101, there are allocated areas which store a plurality of subroutines #1, #2, . . . #N (111, 112, 113), and a subroutine memory area 106 which is used by the subroutines. As the memory 101, an optional type can be used, for example, an RAM (or random access memory) or a flash memory. In addition...
second embodiment
[0086]FIG. 9 is a block diagram, showing the configuration of a memory protection unit according to a second embodiment of the present invention. The memory protection unit shown in FIG. 9 is configured by: a CPU (or central processing unit) 100; a memory 101; and a memory management unit (or MMU) 102. The CPU 100, the memory 101 and the memory management unit 102 can mutually transmit and receive data, for example, through a bus. The CPU 100 functions as a subroutine choice section 103, a memory-area specification section 104, a subroutine calling section 105, and a first interruption-response processing section 301. Those functions are realized by executing a memory protection program which is recorded beforehand in a computer-readable record medium such as an ROM. In FIG. 9, the components which have the same configuration as those in FIG. 1 are given the identical reference numerals and characters. Thus, their description is omitted. In FIG. 9, the part which is different from F...
third embodiment
[0095]FIG. 12 is a block diagram, showing the configuration of a memory protection unit according to a third embodiment of the present invention. The memory protection unit shown in FIG. 12 is configured by: a CPU (or central processing unit) 100; a memory 101; and a memory management unit (or MMU) 102. The CPU 100, the memory 101 and the memory management unit 102 can mutually transmit and receive data, for example, through a bus. The CPU 100, the memory 101 and the memory management unit 102 can mutually transmit and receive data, for example, through a bus. The CPU 100 functions as a subroutine choice section 103, a memory-area specification section 104, a subroutine calling section 105, and a second interruption-response processing section 401. Those functions are realized by executing a memory protection program which is recorded beforehand in a computer-readable record medium such as an ROM. In FIG. 12, the components which have the same configuration as those in FIG. 9 are gi...
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