Microcomputer and microcomputer system

Abstract

A microcomputer is provided with a data-transfer unit such as a DMA (direct memory access) controller for controlling a transfer of data through an external bus. Used in an access to an external device controlled by the data-transfer unit, a bus-interface means of the microcomputer includes a buffer-register means which can be specified as either a source location or a destination location of a data transfer. Thus, an internal-bus master such as a CPU employed in the microcomputer is capable of reading out information such as a packet command from the buffer-register means at a high speed through an internal bus without using the external bus and, hence, capable of carrying out an operation reflecting a transfer control condition specified by the packet command.

Description

BACKGROUND OF THE INVENTION [0001] In general, the present invention relates to a microcomputer and a semiconductor integrated circuit including an embedded data-transfer device. More particularly, the present invention relates to an effective technology applicable to typically a single-chip data processor or a single-chip microcomputer. [0002] A typical microcomputer comprises functional blocks such as a CPU (central processing circuit) serving as a nucleus component, a ROM (read-only memory) for storing a program, a RAM (random-access memory) for storing data and an input / output circuit for inputting and outputting data which are built on a semiconductor substrate as described on pages 540 to 541 of a publication entitled “LSI Handbook” published by Ohm Corporation on Nov. 30, 1984. [0003] The microcomputer may include an embedded DMAC (direct memory access controller) which is capable of transferring data independently of the CPU. An example of a document describing such a microc...

AI Technical Summary

Benefits of technology

[0016] It is thus an object of the present invention addressing the problems described above to provide a microcomputer including an embedded data-transfer unit such as a DMAC for enhancing the data processing total performance and to provide a semiconductor integrated circuit with such a microcomputer embedded therein.

[0017] It is another object of the present invention to provide a microcomputer which has a function of supplying transfer control information such as a packet command used for specifying details of a data transfer to a data processing unit for analyzing the information with a high degree of efficiency and allows an increase in circuit scale caused by the function to be reduced to a minimum, and to provide a semiconductor integrated circuit with such a microcomputer embedded therein.

[0018] It is still another object of the present invention to provide a microcomputer which allows increases in physical and logical scales each to be reduced to a minimum and is capable of executing control of a data transfer through an external bus of the microcomputer concurrently with a CPU operation such as an access made by a CPU embedded in the microcomputer to an internal bus.

Problems solved by technology

Even though the data-transfer control of the DMAC is executed independently of the operation of the CPU, however, data is transferred by the DMAC through a bus shared by the CPU so that bus cycles required for transferring the data inevitably halt the operation of the CPU.

During these 6 states, the CPU is not capable of using the bus.

Such a time most likely becomes an overhead which has nothing to do with the actual operation to transfer data through the shared bus.

Thus, such a DMAC can not be said to be a cost-effective solution.

If a DMAC suitable for a system is developed individually for each system only because a general-purpose DMAC is not cost effective as described above, however, the development of such a DMAC specialized for a system will incur as much a cost as the development of a new LSI separate from the microcomputer, most likely raising a manufacturing-cost problem.

The elimination of such a data bus contributes to the shrinkage of the physical size of the microcomputer.

Thus, storing the transfer control information in an external RAM serving as a buffer memory is not a good solution.

In addition, the external bus cannot probably be made as wide as the bus width of the CPU.

Moreover, if the data-transfer unit is carrying out a transfer of data through another data-transfer channel, it will be quite within the bounds of possibility that the speed to process the transfer control information is reduced due to a contention for the external bus with the transfer of data.

Furthermore, from the memory-management point of view, it is not desirable to store data and transfer control information in the same memory.

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