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Asynchronous system-on-a-chip interconnect

a technology of asynchronous system and chip, applied in the direction of phase-modulated carrier system, generating/distributing signals, instruments, etc., can solve the problem of difficult implementation of efficient interconnection solutions, and achieve the effect of being sensitive to variations in system module performan

Inactive Publication Date: 2006-10-26
FULCRUM MICROSYST
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

[0006] According to the present invention, a system interconnect solution is provided which is operable to interconnec...

Problems solved by technology

This makes it very difficult to implement an efficient interconnect solution.

Method used

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  • Asynchronous system-on-a-chip interconnect
  • Asynchronous system-on-a-chip interconnect
  • Asynchronous system-on-a-chip interconnect

Examples

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Embodiment Construction

[0049] Reference will now be made in detail to specific embodiments of the invention including the best modes contemplated by the inventors for carrying out the invention. Examples of these specific embodiments are illustrated in the accompanying drawings. While the invention is described in conjunction with these specific embodiments, it will be understood that it is not intended to limit the invention to the described embodiments. On the contrary, it is intended to cover alternatives, modifications, and equivalents as may be included within the spirit and scope of the invention as defined by the appended claims. In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present invention. The present invention may be practiced without some or all of these specific details. In addition, well known process operations have not been described in detail in order not to unnecessarily obscure the present invention.

[0050] Asy...

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PUM

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Abstract

Methods and apparatus are described relating to a system-on-a-chip which includes a plurality of synchronous modules, each synchronous module having an associated clock domain characterized by a data rate, the data rates comprising a plurality of different data rates. The system-on-a-chip also includes a plurality of clock domain converters. Each clock domain converter is coupled to a corresponding one of the synchronous modules, and is operable to convert data between the clock domain of the corresponding synchronous module and an asynchronous domain characterized by transmission of data according to an asynchronous handshake protocol. An asynchronous crossbar is coupled to the plurality of clock domain converters, and is operable in the asynchronous domain to implement a first-in-first-out (FIFO) channel between any two of the clock domain converters, thereby facilitating communication between any two of the synchronous modules.

Description

RELATED APPLICATION DATA [0001] The present application is a continuation of and claims priority under 35 U.S.C. 120 to U.S. patent application Ser. No. 10 / 634,597 for ASYNCHRONOUS SYSTEM-ON-A-CHIP INTERCONNECT filed on Aug. 4, 2003 (Attorney Docket No. FULCP009) which claims priority under 35 U.S.C. 119(e) to U.S. Provisional Patent Application No. 60 / 444,820 for ASYNCHRONOUS INTERCONNECT SYSTEM filed on Feb. 3, 2003 (Attorney Docket No. FULCP009P), the entire disclosures of both of which are incorporated herein by reference for all purposes. U.S. patent application Ser. No. 10 / 634,597 is also a continuation-in-part of and claims priority under 35 U.S.C. 120 to each of U.S. patent application Ser. No. 10 / 136,025 for ASYNCHRONOUS CROSSBAR CIRCUIT WITH DETERMINISTIC OR ARBITRATED CONTROL filed on Apr. 30, 2002 (Attorney Docket No. FULCP001), and U.S. patent application Ser. No. 10 / 212,574 for TECHNIQUES FOR FACILITATING CONVERSION BETWEEN ASYNCHRONOUS AND SYNCHRONOUS DOMAINS filed on...

Claims

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Application Information

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IPC IPC(8): H04L7/00G06F1/12G06F13/42H01LH01L27/20H04J3/06H04L7/02H04L27/20
CPCG06F1/12G06F13/423G06F2213/0038H04L7/02H04L49/101H04L2012/5674H04L7/005H04Q2213/13034H04Q2213/13214H04Q2213/13322H04Q2213/13361H04Q2213/13362H04Q3/0004
Inventor CUMMINGS, URILINES, ANDREW
Owner FULCRUM MICROSYST
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