Method for creating critical section code using a software wrapper for proactive synchronization within a computer system

Abstract

A method for creating critical section code using a software wrapper includes creating a high-level expression for requesting exclusive access to one or more memory resource addresses. The high-level expression may include an ACQUIRE function call that includes one or more arguments associated with the one or more memory resource addresses. The method may also include creating a low-level set of instructions by compiling the high-level expression into native instructions. The low-level set of instructions includes a specification phase for requesting exclusive access to the one or more memory resource addresses. In response to compiling the ACQUIRE function call, the method includes creating the specification phase of code, which may include generating an instruction stream having LOCK-based memory reference instructions having a LOCK prefix on the one or more arguments, and inserting an ACQUIRE instruction into the instruction stream.

Description

[0001] This application claims the benefit of U.S. Provisional Application No. 60 / 710,548, filed on Aug. 23, 2005.BACKGROUND OF THE INVENTION [0002] 1. Field of the Invention [0003] This invention relates to microprocessors and, more particularly, to process synchronization between processors in a multiprocessor system. [0004] 2. Description of the Related Art [0005] Modern microprocessor performance has increased steadily and somewhat dramatically over the past 10 years or so. To a large degree, the performance gains may be attributed to increased operating frequency and moreover, to a technique known as deep pipelining. Generally speaking, deep pipelining refers to using instruction pipelines with many stages, with each stage doing less, thereby enabling the overall pipeline to execute at a faster rate. This technique has served the industry well. However, there are drawbacks to increased frequency and deep pipelining. For example, clock skew and power consumption can be significa...

AI Technical Summary

Benefits of technology

The patent describes a method for creating code that can access memory resources with exclusive access. This is important for ensuring that multiple applications can work together without interfering with each other. The method allows for the creation of high-level functions that request access to memory, which are then translated into native instructions. This results in a more efficient and effective system. The method also includes a specification phase that generates instructions for accessing memory, as well as a LOCK-based memory instruction set that allows for data loading and prefetching. Overall, this method improves performance and reliability in computer systems.

Problems solved by technology

However, there are drawbacks to increased frequency and deep pipelining.

For example, clock skew and power consumption can be significant during high frequency operation.

As such, the physical constraints imposed by system level thermal budget points, and the increased difficulty in managing clock skew may indicate that practical limits of the technique may be just around the comer.

As computing systems employ multiprocessing schemes with more and more processors (e.g., processing cores), the number of requestors that may interfere or contend for the same memory datum may increase to such an extent that conventional methods of process synchronization may be inadequate.

As the scale of multiprocessing grows, these primitives become less and less efficient.

However, we are now entering the realm in which even these hardware primitives may not provide the kind of performance that may be demanded in high-performance, high processor count multiprocessors.

This type of synchronization may incur an undesirable waste of time, particularly when many processors are attempting the same synchronizing event, since no more than one processor can make forward progress at any instant in time.

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