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Method of erasing data from SONOS memory device

a memory device and data erasing technology, applied in semiconductor devices, transistors, instruments, etc., to achieve the effect of high erasing speed

Inactive Publication Date: 2007-06-21
SAMSUNG ELECTRONICS CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

The present invention provides a SONOS memory device and a method of erasing data in the device that overcome disadvantages of existing technologies. The device has a high erasing speed and the method allows for the injection of charge carriers of a second sign, opposite the first sign, into the device to erase data. The device includes a bit line and a word line connected to first and second electrodes, a tunnel oxide layer, a nitride film, and a gate electrode. The charge carriers of the first sign are trapped in the nitride film and the charge carriers of the second sign, opposite the first sign, are generated by an electric field formed between the electrodes. The method involves applying a predetermined voltage to the electrodes and forming an electric field between them to inject the charge carriers of the second sign into the trapping layer. The device and method provide a faster and more efficient way to erase data in a SONOS memory device.

Problems solved by technology

However, in the case of a NAND flash memory, a FN current is used for recording and erasing data, since not all of the electrons scattered in the nitride film can be erased using the HHI method.

Method used

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Embodiment Construction

[0037] This application claims the priority of Korean Patent Application No. 2003-38681 filed on Jun. 16, 2003, in the Korean Intellectual Property Office, entitled: “SONOS Memory Device and Method of Erasing Data from the Same,” the disclosure of which is incorporated herein in its entirety by reference.

[0038] The present invention will now be described more fully hereinafter with reference to the accompanying drawings, in which preferred embodiments of the invention are shown. The invention may, however, be embodied in different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art. In the figures, the dimensions of layers and regions are exaggerated for clarity of illustration. It will also be understood that when a layer is referred to as being “on” another layer or substrate, it ca...

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Abstract

A SONOS memory device, and a method of erasing data from the same, includes injecting charge carriers of a second sign into a trapping film, which traps charge carriers of a first sign to store data therein. The charge carriers of the second sign are generated by an electric field formed between one of a first and second electrodes contacting at least one bit line and a gate electrode contacting a word line. A blocking film may be provided between the gate electrode and the trapping film. The charge carriers of the second sign may be hot holes. This erasing improves erasing speed, thereby improving performance of the SONOS memory device.

Description

CROSS REFERENCE TO RELATED APPLICATION(S) [0001] This is a divisional application based on pending application Ser. No. 10 / 867,706, filed Jun. 16, 2004, the entire contents of which is hereby incorporated by reference.BACKGROUND OF THE INVENTION [0002] 1. Field of the Invention [0003] The present invention relates to a SONOS memory device and a method of erasing data therefrom. More particularly, the present invention relates to a SONOS memory device in which an erasing speed is improved by using hot holes and a method of erasing data therefrom. [0004] 2. Description of the Related Art [0005]FIGS. 1A and 2A illustrate cross-sectional views showing a principle of recording information to and erasing information from a memory cell of a conventional silicon oxide nitride oxide silicon (SONOS) flash EEPROM (Electrically Erasable and Programmable Read Only Memory). FIGS. 1B and 2B are schematic drawings illustrating energy band gaps when recording information to and erasing information f...

Claims

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Application Information

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Patent Type & Authority Applications(United States)
IPC IPC(8): H01L29/792G11C16/04H01L21/8247H01L29/788H10B69/00
CPCG11C16/0466H01L29/792H01L29/66833H10B43/30
Inventor CHAE, SOO-DOOKIM, CHUNG-WOOLEE, JO-WONKIM, MOON-KYUNG
Owner SAMSUNG ELECTRONICS CO LTD