CMOS transistor and the method for manufacturing the same

Abstract

A CMOS transistor and a method for manufacturing the same are disclosed. A semiconductor substrate having at least a PMOS transistor and an NMOS transistor is provided. The source / drain of the PMOS transistor comprises SiGe epitaxial layer. A carbon implantation process is performed to form a carbon-doped layer in the top portion of the source / drain of the PMOS transistor. A silicide layer is formed on the source / drain. A CESL is formed on the PMOS transistor and the NMOS transistor. The formation of the carbon-doped layer is capable of preventing Ge out-diffusion.

Description

BACKGROUND OF THE INVENTION[0001]1. Field of the Invention[0002]The present invention is related to a CMOS transistor and a method for manufacturing the same, and particularly, to a CMOS transistor capable of preventing Ge out-diffusion and a method for manufacturing the same.[0003]2. Description of the Prior Art[0004]Industrial circles are used to reducing device dimensions to improve the performance of metal-oxide semiconductor (MOS) transistors. However, this method has encountered difficulties with high-expenses and technical bottlenecks in recent years. For these reasons, the industrial circles seek other methods to improve MOS transistor performance. And accordingly, a popular method is to utilize the material characteristics to cause strain effect on MOS transistors.[0005]In order to increase the driving current of a complementary metal-oxide semiconductor (CMOS) transistor including a p-type MOS (PMOS) transistor and an n-type MOS (NMOS) transistor, the industrial circles de...

AI Technical Summary

Benefits of technology

[0009]In addition, the present invention further discloses a CMOS transistor. The CMOS transistor has a semiconductor substrate, at least a NMOS transistor and at least a PMOS transistor disposed on the semiconductor substrate, and a CESL disposed on the PMOS transistor and the NMOS transistor. The PMOS transistor has a source / drain, which includes Ge therein. A carbon-doped layer is disposed in the top portion of the source / drain of the PMOS transistor, and so that, the CMOS transistor of the present invention is capable of preventing Ge-out diffusion.

Problems solved by technology

However, this method has encountered difficulties with high-expenses and technical bottlenecks in recent years.

The substrate-strained based system is performed with a strained-silicon substrate or a selective epitaxial growth process that results in lattice constant discrepancy.

Besides, Ge-out diffusion results in silicide agglomeration that increases resistance, reduces the concentration of the Ge in the SiGe epitaxial layer, and affects the accuracy of the threshold voltage of the PMOS transistor 12.

Images