Stack package

Abstract

A stack package includes a first semiconductor chip first pads and second pads disposed thereon and a second semiconductor chip having third pads and fourth pads electrically connected with the second pads disposed thereon. Capacitors are interposed between the first semiconductor chip and the second semiconductor chip, and include first electrodes electrically connected with the first pads to of the first semiconductor chip, second electrodes electrically connected with the third pads of the second semiconductor chip, and dielectrics interposed between the first electrodes and the second electrodes.

Description

CROSS-REFERENCE TO RELATED APPLICATIONSThe present application claims priority to Korean patent application number 10-2010-0010105 filed on Feb. 3, 2010, which is incorporated herein by reference in its entirety.BACKGROUND OF THE INVENTIONThe present invention relates generally to a stack package, to and more particularly, to a stack package in which a capacitor is embedded to reduce power noise.A semiconductor package having a semiconductor chip capable of storing and / or processing a huge amount of data within a short period has been developed.It is known that stack a package, in which a plurality of semiconductor chips are stacked, increases data storage capacity. Further, a stack package is known, in which a memory semiconductor chip and a system semiconductor chip are stacked to increase a data storage capacity and also to improve a data processing speed.In order to maintain a data processing speed at a high level, it is necessary to minimize power noise that is generated at an ...

AI Technical Summary

Benefits of technology

Embodiments of the present invention include a stack package in which a capacitor for reducing power noise is reliably embedded at a reduced cost.

Also, embodiments of the present invention include a stack package which can realize a capacitor of a large capacity.

Further, embodiments of the present invention include a stack package which can prevent the volume of the package from increasing and accomplish the simplification of manufacturing processes.

Problems solved by technology

Known methods of forming such a capacitor are costly and are unreliable.

Further, according to the known methods, it is difficult to realize a capacitor having a large capacity, and therefore such capacitors have limitations in reducing power noise.

In addition, in the case of mounting the capacitor on the substrate, a problem is caused in that the volume of a package increases and a separate mounting process is needed.

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