Nonvolatile Logic Array with Built-In Test Drivers

Abstract

A system on chip (SoC) provides a nonvolatile memory array that is configured as n rows by m columns of bit cells. Each of the bit cells is configured to store a bit of data. There are m bit lines each coupled to a corresponding one of the m columns of bit cells. There are m write drivers each coupled to a corresponding one of the m bit lines, wherein the m drivers each comprise a write one circuit and a write zero circuit. The m drivers are operable to write all ones into a row of bit cells in response to a first control signal coupled to the write one circuits and to write all zeros into a row of bit cells in response to a second control signal coupled to the write zero circuits.

Description

FIELD OF THE INVENTION[0001]This invention generally relates to nonvolatile memory cells and their use in a system, and in particular, in combination with logic arrays to provide nonvolatile logic modules.BACKGROUND OF THE INVENTION[0002]Many portable electronic devices such as cellular phones, digital cameras / camcorders, personal digital assistants, laptop computers, and video games operate on batteries. During periods of inactivity the device may not perform processing operations and may be placed in a power-down or standby power mode to conserve power. Power provided to a portion of the logic within the electronic device may be turned off in a low power standby power mode. However, presence of leakage current during the standby power mode represents a challenge for designing portable, battery operated devices. Data retention circuits such as flip-flops and / or latches within the device may be used to store state information for later use prior to the device entering the standby po...

AI Technical Summary

Benefits of technology

The invention relates to a system on chip (SoC) that includes a nonvolatile logic module (NVLM) that uses a combination of flip-flops and a shadow latch to store state information during standby power modes. The NVLM is designed to reduce leakage current and power consumption during periods of inactivity. The invention also includes a method for generating parity in the NVLM to improve data retention and a level converter for use in the NVLM. The technical effects of the invention include improved data retention and reduced power consumption for portable electronic devices, particularly those that use batteries for power.

Problems solved by technology

However, presence of leakage current during the standby power mode represents a challenge for designing portable, battery operated devices.

However, some power is still required to retain the saved state.

However, typical energy harvesters provide a very small amount of power for low-energy electronics.

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