Multi-area micro-wire structure

a micro-wire, multi-area technology, applied in the direction of resistance/reactance/impedence, printed circuit manufacturing, instruments, etc., can solve the problems of limited transparency and conductivity, tendency to crack under mechanical or environmental stress, and increasing cost of transparent conductive metal oxides, so as to reduce manufacturing steps

Inactive Publication Date: 2015-09-24
EASTMAN KODAK CO
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

[0019]The present invention provides a multi-layer micro-wire structure, a multi-area micro-wire structure, and a method of making a multi-layer micro-wire structure with fewer manufacturing steps.

Problems solved by technology

Transparent conductive metal oxides are well known in the display and touch-screen industries and have a number of disadvantages, including limited transparency and conductivity and a tendency to crack under mechanical or environmental stress.
Transparent conductive metal oxides are increasingly expensive and relatively costly to deposit and pattern.
Moreover, the substrate materials are limited by the electrode material deposition process (e.g. sputtering) and the current-carrying capacity of such electrodes is limited, thereby limiting the amount of power that is supplied to the pixel elements.
Although thicker layers of metal oxides or metals increase conductivity, they also reduce the transparency of the electrodes.

Method used

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Embodiment Construction

[0037]The present invention is directed toward multi-layer and multi-area micro-wire structures and methods of making such structures with improved efficiency and reduced cost. In an embodiment, the multi-layer micro-wire structure is used in a capacitive touch screen or in conjunction with a display device.

[0038]Referring to the cross sections of FIGS. 1A-1D and to the flow diagram of FIG. 2, in an embodiment of the present invention a method of making a multi-layer micro-wire structure 5 (FIG. 1D) includes providing a substrate 10 having first and second distinct and separated areas 23, 33 (FIG. 1A) in step 200.

[0039]Referring to FIG. 1B, a micro-wire layer 12 is located in contact with the substrate 10 in step 210. The micro-wire layer 12 has a first layer edge 24 and a second layer edge 34 different from the first layer edge 24. The micro-wire layer 12 also has first and second distinct and separated areas 23, 33 spatially corresponding to the first and second distinct and separ...

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Abstract

A multi-area micro-wire structure includes a substrate and a micro-wire layer having first and second distinct and separated areas and first and second layer edges, respectively. The second layer edge is different from the first layer edge and the second area is larger than the first area. One or more first micro-wire electrodes and one or more first connection pads are located in the micro-wire layer in the first area. One or more second micro-wire electrodes and one or more second connection pads are located in the micro-wire layer in the second area. Each micro-wire electrode includes one or more electrically connected micro-wires. Each first or second connection pad is located adjacent to the first or second layer edge and electrically connected to a corresponding first or second micro-wire electrode, respectively.

Description

CROSS REFERENCE TO RELATED APPLICATIONS[0001]Reference is made to commonly-assigned, co-pending U.S. patent application Ser. No. ______ (Kodak Docket K001667) filed concurrently herewith, entitled “Making Multi-Layer Micro-Wire Structure” by Ronald S. Cok, and commonly-assigned, co-pending U.S. patent application Ser. No. ______ (Kodak Docket K001745) filed concurrently, entitled “Multi-Layer Micro-Wire Structure” by Ronald S. Cok, the disclosures of which are incorporated herein.[0002]Reference is made to commonly-assigned, co-pending U.S. patent application Ser. No. 14 / 023,740, field Sep. 11, 2013, entitled “Multi-Layer Micro-Wire Substrate Structure” by Ronald S. Cok and to commonly-assigned, co-pending U.S. patent application Ser. No. 14 / 023,757, filed Sep. 11, 2013, entitled “Multi-Layer Micro-Wire Substrate Method” by Ronald S. Cok, the disclosures of which are incorporated herein.FIELD OF THE INVENTION[0003]The present invention relates to substrate structures and methods for...

Claims

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Application Information

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Patent Type & Authority Applications(United States)
IPC IPC(8): G06F3/044G01R27/26
CPCG06F3/044G06F2203/04112G01R27/2605G06F3/0445Y10T29/49155Y10T156/10Y10T156/1075H05K3/4638H05K2203/06
Inventor COK, RONALD STEVEN
Owner EASTMAN KODAK CO
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