Apparatus with load dump protection
a technology of load dump and electrical equipment, applied in the direction of electrical equipment, emergency protective arrangement details, and arrangements responsive to excess voltage, etc., can solve the problems of surge pulse or voltage transient, load dump situation, and power supply failure,
Active Publication Date: 2017-12-14
ELITE SEMICON MEMORY TECH INC
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- Description
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- Application Information
AI Technical Summary
Benefits of technology
The present invention provides an apparatus for driving a load between first and second output nodes. It includes first and second half-bridge circuits, comparators, clamping circuits, and a logic circuit. The apparatus allows for independent control of the voltage supplied to the load between the first and second output nodes. The technical effect of the invention is to provide a flexible and efficient apparatus for driving loads.
Problems solved by technology
In an automotive application, abnormal conditions, such as load dump situations, surge pulses or voltage transients, may occur on power supplies.
Method used
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Embodiment Construction
[0010]FIG. 1 shows a block diagram of an electronic apparatus 100 according to one embodiment of the present invention. In this embodiment, the electronic apparatus 100 includes a class-D amplifier for driving a load 12. Class-D amplifiers are commonly used as speaker drivers in consumer, automotive and mobile applications. Referring to FIG. 1, the apparatus 100 comprises the class D amplifier with an H-bridge output stage. The H-bridge output stage consists of two complementary half-bridge output stages 14 and 15. One half-bridge output stage 14 has a high-side transistor M1 and a low-side transistor M2 connected in series between a supply potential VDD and a supply potential GND, and the other half-bridge output stage 15 has a high-side transistor M3 and a low-side transistor M4 connected in series between the power supply potential VDD and the supply potential GND. The half-bridge output stage 14 has a non-inverting output OUTP and the half-bridge output stage 15 has an inverting...
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An apparatus with load dump protection incorporates first and second half-bridge circuits, first and second comparators, and first and second clamping circuits. The first comparator compares a supply voltage with a first set voltage and generates a first comparison signal while the supply voltage exceeds the first set voltage. The second comparator compares the supply voltage with a second set voltage and generates a second comparison signal while the supply voltage exceeds the second set voltage. The first clamping circuit divides the supply voltage and provides a divided voltage to the first half-bridge circuit in response to the second comparison signal. The second clamping circuit divides the supply voltage and provides a divided voltage to the second half-bridge circuit in response to the second comparison signal.
Description
BACKGROUND OF THE INVENTION1. Field of the Invention[0001]The present invention relates generally to an electronic apparatus, and more particularly to an electronic apparatus having a load dump protection circuit.2. Description of the Related Art[0002]In an automotive application, abnormal conditions, such as load dump situations, surge pulses or voltage transients, may occur on power supplies.[0003]When a load dump occurs, a surge voltage higher than 100V is applied to an electronic apparatus. In order to protect against high voltage, a protection circuit is required to protect devices of the system from permanent damage during a load dump.SUMMARY OF THE INVENTION[0004]One aspect of the present invention is to provide an apparatus for driving a load between first and second output nodes. The apparatus comprises a first half-bridge circuit, a second half-bridge circuit, a first comparator, a second comparator, a first clamping circuit, and a second clamping circuit. The first half-b...
Claims
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Patent Timeline
Login to View More IPC IPC(8): H02H3/22H02H1/00
CPCH02H1/0007H02H3/22H02H3/20H02H7/067H02H7/0838H02H7/1203H02H9/04
Inventor TSAO, SZU-CHUN
Owner ELITE SEMICON MEMORY TECH INC