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Signal encoding method capable of reducing tandem ATA separated entity layer interface signal numbers

A separate, physical layer technology, applied in electrical digital data processing, instruments, etc., can solve problems such as occupying a large area, the main control chip 12 is large, and the pass rate is difficult to control, and achieves the effect of reducing interface signals.

Inactive Publication Date: 2007-12-05
VIA TECH INC
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  • Abstract
  • Description
  • Claims
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AI Technical Summary

Problems solved by technology

Although such a structure can support serial ATA devices and parallel ATA devices at the same time, however, the serial ATA physical layer 123 needs to occupy a relatively large area because it is mainly composed of high-frequency analog circuits, and it is desired to integrate it into the main control In the chip 12, the area of ​​the main control chip 12 will be too large, and the pass rate of its production is difficult to control

Method used

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  • Signal encoding method capable of reducing tandem ATA separated entity layer interface signal numbers
  • Signal encoding method capable of reducing tandem ATA separated entity layer interface signal numbers
  • Signal encoding method capable of reducing tandem ATA separated entity layer interface signal numbers

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Embodiment Construction

[0046] First, please refer to FIG. 2 , which is a circuit block diagram of a split physical layer chip according to a preferred embodiment of the present invention. As shown in the figure, its main structure includes: a parallel serial converter (serialize / deserializer; SerDes), a phase locked loop (phase locked loop; PLL), at least one transmitter (transmitter) 405, at least one receiver A receiver 407 and at least one OOB signal detector 461 .

[0047] The components required for the tandem ATA physical layer under the framework of the present invention are designed in two chips according to the circuit characteristics. The separate physical layer chip 40 includes all high-frequency analog circuits, and the other physical layer circuits are digital. The main circuit is integrated in the storage media controller, such as the encoder (8B10Bencoder) that converts the 8bits signal and control signal of parallel ATA into 10bits signal and converts the 10bits signal from serial AT...

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Abstract

The present invention relates to a signal coding method capable of reducing number of tandem ATA separated entity layer pin positions. It is characterized by that in the data signal transferred between tandem ATA separated entity layer and storage medium controller a coder and a decoder are used to enter control signal and state signal in said data signal so as to reduce connected pin positions.

Description

technical field [0001] The present invention relates to a signal encoding method of circuit structure of ATA interface, in particular to a signal encoding method capable of reducing the number of serial ATA separation physical layer pins. Background technique [0002] In recent years, due to the high development of information-related industries and people's increasing requirements for computing and transmission speeds of information products, the industry has been continuously devoting itself to the development of various transmission interface specifications. As far as storage interfaces are concerned, the earliest transmission rate is 16MBps ATA (Advanced Technology Attachment) interface, through continuous improvement, it produces ATA33 interface with a transmission rate of 33MBps (mega byte persecond), ATA66 interface with a transmission rate of 66MBps, and even interface specifications such as ATA100 and ATA133. However, because the above-mentioned interface specificati...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F13/38
Inventor 江晋毅王泽贤
Owner VIA TECH INC
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