Electric charge detecting apparatus

Abstract

There is provided a charge detecting device that can convert an accumulated charge to a voltage at a low voltage and a high efficiency, and has a large dynamic range of an output voltage and satisfactory linearity of a conversion efficiency. The charge detecting device includes a charge accumulating portion including a low concentration N-type (N-) layer 108 formed in a P-type well 101 and a high concentration N-type (N+) layer formed between the N- layer and a principal surface. The N+ layer is connected to an input terminal of an amplifying transistor of an output circuit, and after a reverse bias is applied to the N+ layer during discharging of the accumulated charge, the entire N- layer is depleted at least until a saturated charge is accumulated.

Description

technical field [0001] The invention relates to a charge detection device suitable for solid-state imaging devices such as CCD sensors and CMOS sensors. Background technique [0002] Devices typified by solid-state imaging devices include a CCD sensor including a photodiode and a CCD shift register, and a CMOS sensor such as an APS (Active Pixel Sensor) including a photodiode and a MOS transistor. [0003] Each pixel of APS includes a photodiode, a MOS switch, an amplifier circuit for amplifying the signal from the photodiode, etc., and has many advantages such as "XY addressing" and "single-chip sensor and signal processing circuit". However, on the other hand, due to the large number of elements in one pixel of APS, the pixel aperture ratio is small, and it is difficult to reduce the size of the chip that determines the size of the optical system, and CCD sensors occupy most of the market. [0004] In recent years, due to the improvement of the miniaturization technology ...

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Problems solved by technology

In this way, contrary to the lower voltage required for the miniaturization of MOS transistors, the characteristics of the transistor cannot be satisfied.

[0010] In addition, in order to suppress the change of conversion efficiency caused by the change of the applied voltage V within a predetermined range, the possible use range ΔCfd of the capacitor Cfd is stipulated, and the dynamic range of the output voltage is narrowed. On the contrary, if the predetermined dynamic range is to be ensured range, there is such a problem: the amount of change of the capacitance Cfd relative to the change of the applied voltage V becomes larger, and the fluctuation of the output voltage relative to the amount of signal charge becomes larger, that is, the linearity of the conversion efficiency deteriorates.

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