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System plate and method for testing chip with high pressure

A high-voltage test and system board technology, applied in the field of chip high-voltage test and chip high-voltage test system board, can solve the problems of increasing time, inconvenient testing, reducing test efficiency, etc., to accelerate the debugging process and improve the development efficiency.

Active Publication Date: 2009-08-05
SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] Under the conditions of the existing large-scale integrated circuit DC parameter high-voltage test system, unless the peripheral circuit is frequently changed, the two high-voltage channels of the EEPROM cannot be tested alternately, which not only brings inconvenience to the test, but also increases time and reduces test efficiency.

Method used

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  • System plate and method for testing chip with high pressure
  • System plate and method for testing chip with high pressure
  • System plate and method for testing chip with high pressure

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Embodiment Construction

[0015] Such as image 3 As shown, the test system using the present invention for testing includes a software test system and a hardware test system that are connected through data transmission lines and perform data transmission. Among them, the software system is composed of operating system, special test program and special test vector. The hardware system is composed of logic tester, probe station, probe card, system board and other hardware. During the chip high-voltage test, the chip under test is fixed on the probe station, the logic tester is connected to the test head through the data transmission line, the test head is connected to the system board, and the software test system controls the hardware test system to test the chip.

[0016] Such as figure 2 As shown, the test channel 74 of the chip high voltage test system board is connected with the amplifier through the relay, the test channel 79 is connected with the test channel 74 through the relay and the ampli...

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Abstract

The invention discloses a chip high-voltage test system board. The high-voltage channel to be tested is connected to the high-voltage test unit through a controllable relay arranged on an idle test channel that can be connected with the high-voltage test unit. The controllable relay on the idle test channel connected to the amplifier is connected to the output of the amplifier, and the controllable relay on the idle test channel selects to connect the high voltage test unit to multiple high voltage channels to be tested through the idle test channel. The invention discloses a high-voltage test method. 1. The high-voltage channel to be measured is connected to a high-voltage test unit through a controllable relay to perform a high-voltage test. The channel to be applied with high voltage is connected to the output of the amplifier through a controllable relay; 2. The channel set on the idle test channel It can control the relay to switch the connection between multiple high-voltage channels and the high-voltage test unit, and perform high-voltage tests on other high-voltage channels that need to be tested. The invention tests a plurality of high-voltage test channels alternately to improve efficiency.

Description

technical field [0001] The invention relates to the field of high-voltage testing of DC parameters of large-scale integrated circuits, in particular to a chip high-voltage testing system board, and also designs a method for using the chip high-voltage testing system board to perform high-voltage testing on chips. Background technique [0002] The existing large-scale integrated circuit DC parameter high-voltage test system is composed of a hardware test system and a software test system. Among them, the hardware test system is composed of large logic tester, automatic probe station, special probe card, special system board and other hardware, and the software test system is composed of operating system, special test program and special test vector. [0003] Such as figure 1 As shown, the test channel 74 of the dedicated system board of the existing large-scale tester is connected to the amplifier through the relay, the test channel 79 is connected to the amplifier through t...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G01R31/28G01R31/303G01R31/317G01R31/3177G01R31/319G01R31/3185
Inventor 杜发魁惠力荪黄海华
Owner SHANGHAI HUAHONG GRACE SEMICON MFG CORP