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Outer pin-free wire holder packaging structure

A technology of lead frame and external pins, which is applied in the direction of semiconductor devices, semiconductor/solid-state device components, electrical components, etc., can solve the problems of increasing packaging steps and production costs, pollution, uneven surfaces, etc., and achieve reduction of packaging steps and The effect of production costs

Active Publication Date: 2009-08-05
ADVANCED SEMICON ENG INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The riser 12 is disposed between the chip 11 and the chip holder 102 using resin, but the chip holder 102 has no structure that can suppress resin overflow, so the resin will overflow to the side of the chip holder 102 Edge and bottom surface, causing pollution and uneven surface problems
Furthermore, the existing packaging structure 1 must use the spacer 12 to be arranged between the chip 11 and the chip holder 102, therefore, the packaging steps and production costs are increased.

Method used

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  • Outer pin-free wire holder packaging structure
  • Outer pin-free wire holder packaging structure
  • Outer pin-free wire holder packaging structure

Examples

Experimental program
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Effect test

Embodiment Construction

[0013] refer to figure 2 , which shows a schematic view of the first embodiment of the lead frame without outer leads of the present invention. The lead frame 2 of the first embodiment includes a frame 20 and a chip holder 21 . The frame 20 has a first surface 201 and a plurality of connecting portions 202 . The inner portion of the connecting portions 202 has a first concave portion 203 , and the first concave portion 203 is an arc angle. In this embodiment, the lead frame 2 is a four-sided flat lead frame without pins. In other applications, the lead frame 2 may also be a two-sided flat lead frame without pins.

[0014] The chip holder 21 is disposed in the frame 20 , the chip holder 21 has a crystal mounting surface 211 and a second concave portion 212 , and the second concave portion 212 is an arc angle. The die mounting surface 211 is located on the same plane as the first surface 201 of the frame 20 , and the second concave portion 212 is formed on a periphery of the...

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PUM

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Abstract

The invention relates to an encapsulation structure of a conductor frame without external pins. The encapsulation structure comprises a conductor frame without external pins, a chip and encapsulation material. The conductor frame without external pins consists of a framework and a chip seat. The framework is provided with a plurality of guiding and connecting parts, and a first depression part is arranged in the inner side part of the guiding and connecting parts. The chip seat is provided with a second depression part which is formed around the chip seat. The second depression part of the invention can inhibit problems like pollution and uneven surface caused by overflow of resin when the chip is arranged on the chip seat. Furthermore, the encapsulation structure of the invention requires no use of pad higher plates arranged between the chip and the chip seat, so as to reduce encapsulation steps and manufacturing cost.

Description

technical field [0001] The invention relates to a packaging structure, in particular to a packaging structure of a lead frame without external leads. Background technique [0002] refer to figure 1 , which shows an existing package structure with no external pins. The packaging structure 1 includes a lead frame 10 without external leads, a chip 11 , a riser 12 , several wires 13 and a packaging material 14 . The lead frame 10 includes a frame 101 and a chip holder 102 . The frame 101 has a first surface 103 and a plurality of connecting portions 104 . The chip holder 102 is disposed in the frame 101 , and the chip holder 102 has a crystal mounting surface 105 , and the crystal mounting surface 105 is on the same plane as the first surface 103 of the frame 101 . The spacer 12 is disposed between the chip 11 and the chip holder 102 by using resin. The wires 13 are used to connect the chip 11 and the conducting portions 104 by wires. The packaging material 14 is used to p...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L23/495
CPCH01L2224/73265H01L2224/32245H01L24/32H01L2224/48247H01L2924/181H01L2224/48091H01L2224/32014H01L2924/00H01L2924/00012H01L2924/00014
Inventor 周昶旭陈淑茵陈子康
Owner ADVANCED SEMICON ENG INC
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